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New Feature Diagnosis and Function Linkage

IP.com Disclosure Number: IPCOM000041420D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 4 page(s) / 65K

Publishing Venue

IBM

Related People

Russell, SJ: AUTHOR

Abstract

Within a device containing a microprocessor that performs a series of diagnostic tests on sub-units within the device, this article describes a mechanism whereby new sub-units can be designed such that the microprocessor will diagnose problems on the new sub-unit and provide functional linkage. The arrangement places the following requirements on any new sub-unit that must have diagnostic code and functional code available to the original device. All new sub-units will carry their own diagnostic code in read-only storage (ROS). All new communication adapters will, in addition, carry suitable initial microprocessor load (IML) code to enable down-stream loading from a host processor.

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New Feature Diagnosis and Function Linkage

Within a device containing a microprocessor that performs a series of diagnostic tests on sub-units within the device, this article describes a mechanism whereby new sub-units can be designed such that the microprocessor will diagnose problems on the new sub-unit and provide functional linkage. The arrangement places the following requirements on any new sub-unit that must have diagnostic code and functional code available to the original device. All new sub-units will carry their own diagnostic code in read-only storage (ROS). All new communication adapters will, in addition, carry suitable initial microprocessor load (IML) code to enable down-stream loading from a host processor. Each new sub-unit's ROS will begin on a unique integral nK boundary and will reside in a pre-allocated address range in the microprocessor's (MPU's) address space. (Note that this limits the number of new sub-units to a maximum of (RANGE/nK) assuming that none are mutually exclusive). There is a trade-off here between the maximum number of features allowed and the amount of reserved spaced in non-volatile store since each feature will require a flag to indicate its presence during the auto-configuration phase (see later). The first bytes of each sub-unit's ROS will form a Feature Linkage Area (FLA) and will contain a "flag-code" (to indicate the presence of ROS at that nK boundary) followed by information to enable the MPU to run the diagnostics for that sub-unit and, if it is a communications adapter, to IML functional code via that adapter. The Feature Linkage Area (FLA) mentioned above is shown in Fig. 1. The fields in the FLA are defined as follows: FLA Start Flag. This is a code that is the same for every sub-unit. Its use is to indicate to the MPU that ROS is present at the particular nK boundary being interrogated. Its value and length should be chosen to avoid the possibility that random data read by the MPU (when trying to access non-existent ROS) will indicate ROS presence. (A further safeguard is provided by the checksum.) ROS Length. This is a field that is set equal to the size of the ROS for the sub-unit. This field is used to indicate to the MPU the range of addresses over which the checksum should be computed. It also enables the code for a sub-unit to occupy more than nK bytes, since if this field indicates that the code for the sub-unit spills over into the next nK block, the MPU will not look for another sub-unit at the next nK boundary. Checksum. This is a value that is computed from the contents of the sub-unit's ROS.

Before passing control to the ROS on the sub-unit card, the MPU recomputes this value and checks it against the value in ROS. Should the two not compare, the MPU will flag this card as bad and will not pass control to either the diagnostic code or the IML code. Mnemonic.

This is a mnemonic that could be used to identify to the user the failing card. It is stored in a device in...