Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

VLSI Embedding Without Cyclic Shorts

IP.com Disclosure Number: IPCOM000041424D
Original Publication Date: 1984-Jan-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Roth, JP: AUTHOR

Abstract

One of the unsolved problems in computer designs implemented in very large scale integration (VLSI) is that of the occurrence of shorts which introduce feedback. When this occurs, then in general new, quite unpredictable, sequential behavior occurs. In fact there are no known methods for their detection. This variety of failure may have a very large number of possible occurrences. Indeed, it has been predicted that for VLSI technologies, shorts will be the most common of failures, far more prevalent than "stuck" failures. A method of embedding is described herein which with high probability prevents shorts which would introduce feedback. There is no difficulty in testing for acyclic shorts [*, chap. 3].

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 69% of the total text.

Page 1 of 1

VLSI Embedding Without Cyclic Shorts

One of the unsolved problems in computer designs implemented in very large scale integration (VLSI) is that of the occurrence of shorts which introduce feedback. When this occurs, then in general new, quite unpredictable, sequential behavior occurs. In fact there are no known methods for their detection. This variety of failure may have a very large number of possible occurrences. Indeed, it has been predicted that for VLSI technologies, shorts will be the most common of failures, far more prevalent than "stuck" failures. A method of embedding is described herein which with high probability prevents shorts which would introduce feedback. There is no difficulty in testing for acyclic shorts [*, chap. 3]. The method depends upon the fact that a wire shorting with another wire introduces feedback if and only if one is a predecessor, direct or indirect, of the other. The method is as follows. Assume that in a given logic design to be embedded in a VLSI chip, the registers and primary inputs are placed first, thence those circuits fed directly by these. The placement and the wiring, the interconnection, should proceed level by level starting from the PIs and RIs. As soon as an interconnection is made, wrap it in an "epsilon-layer" of space, i.e., remove from the embedding space remaining not only the wire(s) itself but also a layer of space uniformly surrounding it, of diameter depending upon the degree of insulation from subsequen...