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Recessed Oxide Isolation Having a Planar Surface

IP.com Disclosure Number: IPCOM000041641D
Original Publication Date: 1984-Feb-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Jimenez, AJ: AUTHOR

Abstract

It is desirable to form a recessed oxide isolation pattern within a silicon body wherein the pattern's top surface is planar with the top surface of the silicon body. A process which accomplishes this planarity is illustrated in Figs. 1-4. Thermal nitridation of bare silicon body 10 produces a silicon nitride (Si3N4) layer 11 of the order of 10 micrometers in thickness. A chemical vapor deposition Si3N4 layer 12 of about 50 micrometers is formed thereover. Standard lithography techniques are used to pattern the designated recessed oxide insulator areas 13, as seen in Fig. 1. Standard directional etch is used to create trench 14, as seen in Fig. 2. The etch rate ratio is assumed to be Si:Si3N4 = 10:1. An example of the reactive ion etching gas is SF6 + Cl2 + He.

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Recessed Oxide Isolation Having a Planar Surface

It is desirable to form a recessed oxide isolation pattern within a silicon body wherein the pattern's top surface is planar with the top surface of the silicon body. A process which accomplishes this planarity is illustrated in Figs. 1-4. Thermal nitridation of bare silicon body 10 produces a silicon nitride (Si3N4) layer 11 of the order of 10 micrometers in thickness. A chemical vapor deposition Si3N4 layer 12 of about 50 micrometers is formed thereover. Standard lithography techniques are used to pattern the designated recessed oxide insulator areas 13, as seen in Fig. 1. Standard directional etch is used to create trench 14, as seen in Fig. 2. The etch rate ratio is assumed to be Si:Si3N4 = 10:1. An example of the reactive ion etching gas is SF6 + Cl2 + He. A second Si3N4 layer 15 is formed by thermal nitridation and followed with a directional etch of the Si3N4 layer 15 to expose the bottom of the trench, as shown in Fig. 3. The various etching steps reduce the thickness of the Si3N4 layers 11, 12, as illustrated in Figs. 1-4. Oxidation of the exposed silicon in a wet oxygen ambient at 950OE produces the recessed oxide isolation pattern 16 of Fig. 4.

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