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Detecting Closely Related Multiple Errors

IP.com Disclosure Number: IPCOM000041716D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-02
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Broadbent, ST: AUTHOR

Abstract

Error detection and correction algorithms usually employ sequential processing upon the detection of an error for locating the error and then correcting same. When plural parity bits are used in the error-detection residue, and the bits are vertical and diagonal in the data array, one error can mask a closely related error. This masking can be improved by snapshotting a plurality of the parity bits and thus detecting the error row earlier, allowing better detection of a second error. The drawing shows an array of data bits having a height of seven bit positions with a first parity bit P0 along the top row of the array for detecting errors along a diagonal, indicated by the slim rectangle, and a second parity bit P1 which detects errors in the vertical dimension.

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Detecting Closely Related Multiple Errors

Error detection and correction algorithms usually employ sequential processing upon the detection of an error for locating the error and then correcting same. When plural parity bits are used in the error-detection residue, and the bits are vertical and diagonal in the data array, one error can mask a closely related error. This masking can be improved by snapshotting a plurality of the parity bits and thus detecting the error row earlier, allowing better detection of a second error. The drawing shows an array of data bits having a height of seven bit positions with a first parity bit P0 along the top row of the array for detecting errors along a diagonal, indicated by the slim rectangle, and a second parity bit P1 which detects errors in the vertical dimension. A first error E in the third row begins error location processing for identifying the third row. In accordance with this disclosure, a snapshot of all the P1 bits beginning in the column where P0 indicates the error then continuing to the column terminating the diagonal check of P0, algorithm then uses the snapshotted plurality of parity bits P1 for indicating the total number of errors actually located in the data array adjacent the error indication. If sequential processing began without the snapshots, the second error in the second row could be missed, for example, because the mechanism would not be looking for an additional error once the error processing for...