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PROCESS FOR FORMING A SELF-ALIGNED SiO2 MOAT

IP.com Disclosure Number: IPCOM000041895D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Pan, PH: AUTHOR

Abstract

A process is provided for forming doped regions which are self-aligned to isolation dielectric moats. Existing processes using SiO2 moat isolation techniques provide for the formation of a thick SiO2 layer over a silicon substrate and the removal, through etching, of the SiO2 layer from the areas selected for the formation of the active device regions. Such processes require an additional masking step to establish the ion-implanted regions under the thick SiO2 moats. The process described in the following processing sequence and explained with reference to Figs. 1-5 overcomes this prior-art problem. A layer of a filler material 12, such as Si3N4, is formed on a substrate 10.

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PROCESS FOR FORMING A SELF-ALIGNED SiO2 MOAT

A process is provided for forming doped regions which are self-aligned to isolation dielectric moats. Existing processes using SiO2 moat isolation techniques provide for the formation of a thick SiO2 layer over a silicon substrate and the removal, through etching, of the SiO2 layer from the areas selected for the formation of the active device regions. Such processes require an additional masking step to establish the ion-implanted regions under the thick SiO2 moats. The process described in the following processing sequence and explained with reference to Figs. 1-5 overcomes this prior-art problem. A layer of a filler material 12, such as Si3N4, is formed on a substrate 10. A layer of a photoresist material is formed on the filler material and patterned to form an etching mask 14 exposing the areas where the field dielectric regions are to be formed. Using etching mask 14 the filler material is reactive ion etched (RIE) to expose the substrate in the areas where the field dielectric regions are to be formed. The filler material 12 is left to cover the areas selected for the active device regions (Fig. 1). Doped regions 16 are formed in substrate 10 through diffusion or ion implantation, in the areas where the dielectric moats are to be formed. The photoresist mask 14 is then removed and the entire structure is covered with a dielectric layer 18, which can be a layer of SiO2 (Fig. 2). The dielectric layer 18 must be th...