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Soliton Bit-Organized Memory

IP.com Disclosure Number: IPCOM000041983D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Rajeevakumar, TV: AUTHOR [+2]

Abstract

Organizing a memory as an array of cells based upon a soliton gate, which propagates a soliton selectively according to the bias on a transmission line, provides high margins which help ensure dependable operation. The memory cell is shown schematically in Fig. 1. Each of the sections of the device is a top view of a Josephson transmission line. The shaded areas are isolation resistors in the top electrodes of the transmission lines (N .33 L). In sections 1, 2, 4 and 7, an inductor is connected between the top electrode and ground. The groundplane forms the bottom electrode of the transmission lines. Another inductor is connected between the top electrodes of sections 5 and 3.

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Soliton Bit-Organized Memory

Organizing a memory as an array of cells based upon a soliton gate, which propagates a soliton selectively according to the bias on a transmission line, provides high margins which help ensure dependable operation. The memory cell is shown schematically in Fig. 1. Each of the sections of the device is a top view of a Josephson transmission line. The shaded areas are isolation resistors in the top electrodes of the transmission lines (N .33 L). In sections 1, 2, 4 and 7, an inductor is connected between the top electrode and ground. The groundplane forms the bottom electrode of the transmission lines. Another inductor is connected between the top electrodes of sections 5 and 3. The inductors in sections 1, 2, 4 and 7 have LI0 < D0/2 to avoid flux trapping, and the inductor between 3 and 5 has LI0 > D0/2 so that flux can be trapped in the interferometer. Each of the four control lines is magnetically coupled to the inductors, as shown. The operation of the cell is based on a soliton gate which uses a change in the bias of a transmission line to control whether a soliton will propagate through the line. The presence or absence of a circulating current in the inductor L3,5 will give section 5 a positive or zero bias, respectively. In the presence of a bias the soliton will propagate; otherwise, it will dissipate in the isolation resistor. A "1" is stored in the cell as the presence of a circulating current. To write a "1", control currents IX1, IY1 and IY2 are turned on and a soliton is introduced at input A. IY1 has the effect of selecting the particular memory cell since it steers the soliton into section 1 by producing a positive bias in section...