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Browse Prior Art Database

Method and Apparatus for Enhanced Sensing of eFuses in Security Applications

IP.com Disclosure Number: IPCOM000042014D
Original Publication Date: 2005-Feb-03
Included in the Prior Art Database: 2005-Feb-03
Document File: 3 page(s) / 65K

Publishing Venue

IBM

Abstract

Disclosed is a method of sensing time sensitive circuits where a first circuit will sense at a faster rate than a second circuit . The circuit sensed at a faster rate will sense incorrectly first allowing a decision about the sensing of the second circuit

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Method and Apparatus for Enhanced Sensing of eFuses in Security Applications

With increased use of eFuse (electronic fuse) usage in application, some applications involve security. The security sensitive applications need to protect eFuse sensing against attacks by altering voltage. frequency or temperature. Current eFuse sensing is performance by a sequence of timed logical operations . If the timing of these operations can be accelerated by replacement of the nominal clock with a faster clock, invalid sensing could occur. This disclosure defines a method of sensing a first set of eFuses at the same time as a second set where the second set is sensed by a biased controller causing failure in sensing at a certain frequency that is greater than the failure frequency of the first set.

     Current eFuses technology requires eFuses to be sensed in an "AC" sense via a sequence of control signals generated by a state machine. If the clock driving the state machine can be altered to a higher rate, the sensing of blown eFuses may sense as un-blown. To preclude this self timed circuit or internal reference clock must be used. Current eFuse circuits are not self-timed and having an internal reference clock is outside of some design requirements.

     To defeat the above mechanism, disclosed is a method of having two sets of eFuses which are:
1) sensed by independent state machines that are started synchronously so they run together.
2) biasing one state machine to fail at a higher frequency than the other state machine. The state machine that causes eFuses sensing to fail at a higher frequence contains the important eFuse information that we seek to protect from attack. The state machine that causes eFuses sensing to fail at a lower frequency senses eFuses that contain a fixed signature with a predetermined constant. By sensing an incorrect eFuse constant from these eFuses that fail first, action can be taken not to use possible faulty sensed data from the important set of eFuses and a secure state can be maintained.

     Fig. 1 shows 2 eFuse sensing state machines which control independent eFuse arrays. Both state machines are controlled by the same clock and both get a synchronizing signal input to cause both state machines to sense at the same time. This is an important part of the disclosure since each state machine must see the same clock cycle for a given state that is active. eFuse A and eFuse B below represent time sensitive circuits which fail when certain input transitions are too short. This can occur if the input clock is accessible and in increased in frequency to a point were the time sensitive circuit fails. Possible solutions are to have self timed eFuse A and...