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Browse Prior Art Database

Emulation of a Data Processor Display Terminal by a Word Processing System - Display Screen Updating

IP.com Disclosure Number: IPCOM000042073D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

Hunt, GT: AUTHOR [+3]

Abstract

The present apparatus is related to that described in the preceding article. The preceding article covers the use of a page traversal register to determine where display screen updating is necessary and thereby to avoid updating of the entire screen. However, there are many instances wherein screen update only involves a single data byte. In such a case, it is not even necessary to update the whole page by the page traversal register technique described in the proceeding article. The present structure provides hardware for determining whether an update involves a single byte or more than a single byte and for updating the screen accordingly. The system must keep track of a two-bit count. This can be done in the link adapter in the apparatus of the preceding article.

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Emulation of a Data Processor Display Terminal by a Word Processing System - Display Screen Updating

The present apparatus is related to that described in the preceding article. The preceding article covers the use of a page traversal register to determine where display screen updating is necessary and thereby to avoid updating of the entire screen. However, there are many instances wherein screen update only involves a single data byte. In such a case, it is not even necessary to update the whole page by the page traversal register technique described in the proceeding article. The present structure provides hardware for determining whether an update involves a single byte or more than a single byte and for updating the screen accordingly. The system must keep track of a two-bit count. This can be done in the link adapter in the apparatus of the preceding article. First, a count must be made as to the existence of a bit which will indicate that at least one byte has been written into the link buffer in the apparatus of the referenced publication. The other bit count indicates whether more than one byte has been written into the link buffer. A simple hardware implementation for keeping track of these two counts is shown in the figure. With reference to the apparatus, it should be noted that the bits are cleared when they are read. Accordingly, if the bit counts indicate to the processor in the word processing terminal that one byte has been written as indicated b...