Browse Prior Art Database

IBM Series/1 Channel Attachment to Bus Architected System

IP.com Disclosure Number: IPCOM000042105D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Bourke, DG: AUTHOR [+4]

Abstract

A mechanism is provided for the attachment of IBM Series/1 processor devices to a bus architected (BA) system without modification or redesign. Series/1 provides a large menu of input/output (I/O) offerings. I/O savings may be realized by providing for the attachment of Series/1 I/O to a bus architected system. An obvious solution would be to simply architect the Series/1 I/O Channel into a BA system. This would, however, severely limit the BA I/O menu and place undue restrictions on I/O developed for BA. The BA System Bus is the architected path for communication between the processor and I/O (I/O commands) and I/O and main storage (direct memory access). The System Bus is an asynchronous, closed-looped packet bus with a multiplexed 32-bit address/data bus. Fig. 1 depicts a logical view of a possible BA system configuration.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 57% of the total text.

Page 1 of 2

IBM Series/1 Channel Attachment to Bus Architected System

A mechanism is provided for the attachment of IBM Series/1 processor devices to a bus architected (BA) system without modification or redesign. Series/1 provides a large menu of input/output (I/O) offerings. I/O savings may be realized by providing for the attachment of Series/1 I/O to a bus architected system. An obvious solution would be to simply architect the Series/1 I/O Channel into a BA system. This would, however, severely limit the BA I/O menu and place undue restrictions on I/O developed for BA. The BA System Bus is the architected path for communication between the processor and I/O (I/O commands) and I/O and main storage (direct memory access). The System Bus is an asynchronous, closed-looped packet bus with a multiplexed 32-bit address/data bus. Fig. 1 depicts a logical view of a possible BA system configuration. Bus Units (BU) attach to the Processor Bus. These Bus Units may be the Main Processor, a floating point processor, timers, storage controller, system bus controllers, and others. The System Bus Controller (SBC) is the translation interface between the Processor Bus and the System Bus. Native I/O Channels interface between "native" I/O and the System Bus. Attachment of Series/1 I/O attachments to the BA System Bus without redesigning all of them is considered here. The Series/1 I/O Channel Attachment to the BA system, hereafter referred to as the S/1 Channel, offers the solution. I/O A...