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Vertically Integrated Load Resistor for Mos Static RAM Cells

IP.com Disclosure Number: IPCOM000042111D
Original Publication Date: 1984-Mar-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Hanafi, HI: AUTHOR [+2]

Abstract

This article describes a vertically integrated load resistor for a Static RAM (random-access memory) cell. Fig. 1 illustrates a circuit diagram of a four-transistor static RAM cell with load resistors. The prior art Static RAM cell has the load resistors made of a high resistivity polysilicon layer arranged horizontally on the surface of the substrate, as shown in Fig. 2. In accordance with the teaching of this article, the load resistors R1 and R2 and the VCC contacts C1 and C2 are vertically integrated over the contact points C3 and C4. Figs. 3-7 illustrate the steps of making this vertically integrated resistor. A contact hole in the oxide layer 12 over a diffused region (or doped polysilicon layer) 10 is patterned using a photoresist layer 14 and etched, as shown in Fig. 3.

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Vertically Integrated Load Resistor for Mos Static RAM Cells

This article describes a vertically integrated load resistor for a Static RAM (random-access memory) cell. Fig. 1 illustrates a circuit diagram of a four- transistor static RAM cell with load resistors. The prior art Static RAM cell has the load resistors made of a high resistivity polysilicon layer arranged horizontally on the surface of the substrate, as shown in Fig. 2. In accordance with the teaching of this article, the load resistors R1 and R2 and the VCC contacts C1 and C2 are vertically integrated over the contact points C3 and C4. Figs. 3-7 illustrate the steps of making this vertically integrated resistor. A contact hole in the oxide layer 12 over a diffused region (or doped polysilicon layer) 10 is patterned using a photoresist layer 14 and etched, as shown in Fig. 3. With the resist in place a high resistivity material or a combination of high resistivity materials (i.e., intrinsic silicon or a doped insulator) is deposited on the structure. A resist lift-off operation removes the resist and all but the portion of the high resistivity material(s) 16 in the contact hole, as shown in Fig. 4. This high resistivity material in the contact hole is the material that will serve as a resistor. An insulating material 18, such as SiO2 or Si3N4, is deposited on the structure, as shown in Fig. 5, using conventional CVD techniques. The conformal properties of the CVD film will result in a thicker insulat...