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Conference Circuit for a Digital Switching System

IP.com Disclosure Number: IPCOM000042180D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Munier, JM: AUTHOR [+2]

Abstract

The present article describes a microprocessor-controlled digital switched conferencing circuit used in a PCM (pulse code modulation) telephone environment. In digital switching systems utilizing PCM, the signals switched are non-linear digital codes representing amplitudes of the original analog voice signals sampled at predetermined intervals. Typically, voice signals are sampled at an 8 KHz rate, and each sample digitized into an 8-bit (1 sign bit, 3 chord bits and 4 step bits) non-linear code. The principle of the proposed system is the use of a microprocessor to analyze and control the PCM voice levels of the conference circuit. The microprocessor decides which of the conferees is the active speaker. This PCM voice signal is then sent to the three listening conferees.

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Conference Circuit for a Digital Switching System

The present article describes a microprocessor-controlled digital switched conferencing circuit used in a PCM (pulse code modulation) telephone environment. In digital switching systems utilizing PCM, the signals switched are non-linear digital codes representing amplitudes of the original analog voice signals sampled at predetermined intervals. Typically, voice signals are sampled at an 8 KHz rate, and each sample digitized into an 8-bit (1 sign bit, 3 chord bits and 4 step bits) non-linear code. The principle of the proposed system is the use of a microprocessor to analyze and control the PCM voice levels of the conference circuit. The microprocessor decides which of the conferees is the active speaker. This PCM voice signal is then sent to the three listening conferees. The active speaker receives the voice samples from the last speaker. The microprocessor constantly analyzes the PCM chord bits of all the conferees to determine their respective voice levels. The micro processor integrates these levels to obtain a decision window from which a change of active speaker can be made. Fig. 1 shows a possible voice slot assignment for three different four-party conference circuits. Each conference circuit is mainly comprised of a microprocessor with a ROS (read-only store) resident microcode. The microprocessor is synchronized on each frame by an interruption (every 125 microseconds). Once the interruption is received...