Browse Prior Art Database

One-Way Interleave

IP.com Disclosure Number: IPCOM000042314D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Sager, GS: AUTHOR [+2]

Abstract

This article describes a hardware implementation for a BSM Configuration Array (BCA) to permit the BCA to operate main storage (MS) in a one-way interleave mode when the BCA is configuring MS for two-way or four-way interleave operation. Tables 1 and 2 show examples of BCA settings for MS interleaving of 2KB blocks between BSMs 0 and 1. The BSM size is assumed to be 4KB (kilobyte) each, but may be any 2n value, such as 8KB. In Tables 1 and 2, each level A, B, C or D in the BCA controls accessing to a contiguous 1MB (megabyte) area on a 1MB boundary in a BSM. (Image Omitted) A form of four-way interleaving is controlled by the BCA in Table 1. The example herein describes two 4MB BSMs with 1 MB levels in each.

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One-Way Interleave

This article describes a hardware implementation for a BSM Configuration Array (BCA) to permit the BCA to operate main storage (MS) in a one-way interleave mode when the BCA is configuring MS for two-way or four-way interleave operation. Tables 1 and 2 show examples of BCA settings for MS interleaving of 2KB blocks between BSMs 0 and 1. The BSM size is assumed to be 4KB (kilobyte) each, but may be any 2n value, such as 8KB. In Tables 1 and 2, each level A, B, C or D in the BCA controls accessing to a contiguous 1MB (megabyte) area on a 1MB boundary in a BSM.

(Image Omitted)

A form of four-way interleaving is controlled by the BCA in Table 1. The example herein describes two 4MB BSMs with 1 MB levels in each. That is, level A includes CPU absolute addresses 0 to 1MB, level B from 1MB to 2MB, level C from 2MB to 3MB, and level D from 3MB to 4MB. Thus in Table 1, CPU absolute address bits 19, 20 will change on each next 2096 kilobyte (2KB) block being addressed in main storage. This causes interleaving of 2KB blocks among the four 1MB levels A, B, C and D. In Table 1, levels A and C are in BSM0, and levels B and D are in BSM1. Furthermore, within the same BSM, the ports 0 and 1 are switches for sequential 2KB blocks. In this manner, Table 1 provides two- way BSM interleaving, but when ports are considered, it provides a type of four- way interleaving. A problem is to use the same type of BCE content settings for a system that has only 1 BSM per po...