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Cylinder Switching

IP.com Disclosure Number: IPCOM000042332D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 2 page(s) / 14K

Publishing Venue

IBM

Related People

Peterson, RA: AUTHOR [+2]

Abstract

Multiple sector operations in direct access storage devices (DASDs) can cross a head or cylinder boundary. In the past, head switching has been performed by the DASD adapter, but cylinder switching has not been done. This is because the cylinder address includes address bits which are contained in the head address field. The address field (Fig. 1) has a one-byte sector address. The second byte contains the track address and two high-order bits of the cylinder address, and the third byte contains the lower-order bits of the cylinder address. Because of this particular format, cylinder switching is more complex. To switch a cylinder, the head address in the second byte is incremented and the cylinder bits in the third byte are incremented.

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Cylinder Switching

Multiple sector operations in direct access storage devices (DASDs) can cross a head or cylinder boundary. In the past, head switching has been performed by the DASD adapter, but cylinder switching has not been done. This is because the cylinder address includes address bits which are contained in the head address field. The address field (Fig. 1) has a one-byte sector address. The second byte contains the track address and two high-order bits of the cylinder address, and the third byte contains the lower-order bits of the cylinder address. Because of this particular format, cylinder switching is more complex. To switch a cylinder, the head address in the second byte is incremented and the cylinder bits in the third byte are incremented. If there is an overflow when incrementing the third byte, then the second byte must again be accessed in order to increment the high-order cylinder bits. In the past, the controlling program had to check for a cylinder crossing, and if one were to occur, the operation was divided into two operations so as to avoid the cylinder crossing. This checking and extra operation are eliminated by providing hardware in the adapter in the form of program logic arrays for performing a head byte sequence and a cylinder byte sequence, as shown in the flow chart of Fig. 2. The adapter includes three registers for containing the 3-byte address. The serialize-deserialize (SERDES) logic in the adapter uses these three registers to compare to the sector ID on the DASD device to ensure the correct sector is being read or written. After a sector operation is completed, and if another sector operation is required, the logic in the adapter increments the sector value in the sector register so that the next block of data can be read or written. If a head boundary is crossed, then the logic in the PLA switches to the head byte sequence 10 of Fig. 2. The first operation in the head byte sequence is to increment the value in the head byte register. This is represented by block 11. Since the cylinder byte sequence 20 has not as yet been entered and therefore the overflow bit will not be set, the cylinder bits are not incremented by the logic, as represented by block 12. A check is then made by the logic, as indicated b...