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First Error Detection Circuit

IP.com Disclosure Number: IPCOM000042370D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Barsotti, RH: AUTHOR [+2]

Abstract

A latching circuit is shown which retains a first-appearing error indication despite subsequent changes to error inputs of the latching arrangement. Specifically, the first failure that is detected on one of the input failure lines 10 is encoded to binary-weighted data by encoder 11. The encoded data passes through AND gates 12 and sets the corresponding bits in the error register 13. After register 13 is loaded, the active output bits are ORed 14, inverted 15, and then used to degate AND gates 12 and thus the input of the register 13. This degate prevents any changes that occur at the output of the encoder from reaching the register and changing its contents. The error trapped in register 13 can now be displayed visually and/or presented to a higher system for component failure analysis.

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First Error Detection Circuit

A latching circuit is shown which retains a first-appearing error indication despite subsequent changes to error inputs of the latching arrangement. Specifically, the first failure that is detected on one of the input failure lines 10 is encoded to binary-weighted data by encoder 11. The encoded data passes through AND gates 12 and sets the corresponding bits in the error register 13. After register 13 is loaded, the active output bits are ORed 14, inverted 15, and then used to degate AND gates 12 and thus the input of the register 13. This degate prevents any changes that occur at the output of the encoder from reaching the register and changing its contents. The error trapped in register 13 can now be displayed visually and/or presented to a higher system for component failure analysis. The error can be cleared from the register by activating the reset line via OR circuit 16. Resetting the register primes it for the next first failure. The encoder is not necessary for implementation. However, it is useful to conserve register size, indicators and data bus bits.

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