Browse Prior Art Database

TOD Clock Synchronization in a Loosely Coupled Environment

IP.com Disclosure Number: IPCOM000042415D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 5 page(s) / 41K

Publishing Venue

IBM

Related People

Keslin, R: AUTHOR [+3]

Abstract

Circuits and a method for synchronizing and checking a plurality of time-of-day (TOD) clocks in a loosely-coupled multiprocessing system are described. Unique hardware synchronizes the low-order part of the TOD clocks, and a unique method synchronizes the high-order part in the same clocks by using carry pulses derived from an intermediate bit position in each TOD clock. The carry pulses and the oscillator pulses from each of the TOD clocks in the system are sent to the other CPUs in the system which have TOD clocks. A program settable register contains an address which can be used to select one of the TOD clocks as a master to which all other TOD clocks can be synchronized. In the case of failure of the master clock, a different TOD clock can be selected by the program.

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TOD Clock Synchronization in a Loosely Coupled Environment

Circuits and a method for synchronizing and checking a plurality of time-of-day (TOD) clocks in a loosely-coupled multiprocessing system are described. Unique hardware synchronizes the low-order part of the TOD clocks, and a unique method synchronizes the high-order part in the same clocks by using carry pulses derived from an intermediate bit position in each TOD clock. The carry pulses and the oscillator pulses from each of the TOD clocks in the system are sent to the other CPUs in the system which have TOD clocks. A program settable register contains an address which can be used to select one of the TOD clocks as a master to which all other TOD clocks can be synchronized. In the case of failure of the master clock, a different TOD clock can be selected by the program. Determination of whether the cables have been correctly connected is provided by means of blocking one of the two signals. This test can be performed without losing the realtime value in the TOD clocks. Remote-TOD-Clock-Synchronization The remote-TOD-clock-synchronization feature provides: (1) a TOD-clock synchronization-selection (SS) register, (2) up to eight four-line interfaces, the number being dependent on the model, (3) two instructions; Set TOD Clock SS Register and Store TOD Clock SS Register, and (4) the TOD-clock-sync-check external interruption and the control-register positions for the TOD-clock-sync-control bit and the mask for the TOD-clock-sync-check external interruption. The signals in each of the four-line interfaces are as follows: Name Direction Oscillator out Output Sync pulse out Output Oscillator in Input Sync pulse in Input Each interface may be connected by means of a cable to another CPU having the remote-TOD-clock-synchronization feature. The oscillator-out and sync-pulse-out lines of one CPU are connected to the oscillator-in and sync-pulse-in lines of the other. Oscillator Out: This is a l-Mhz signal which may be used to synchronize the stepping of the TOD clock in another CPU. When the TOD clock in this CPU is running, bit 52 of the TOD clock is synchronized with the oscillator-out line of this CPU. When the TOD clock in this CPU is stepped by means of a remote oscillator-in line, the oscillator-out line from this CPU is not necessarily stepped in synchronism with the selected oscillator-in line. Sync Pulse Out: The sync-pulse-out line rises for 1 microsecond when a carry occurs from bit position 32 into bit position 31 of the TOD clock in this CPU. The sync-pulse-out line is not active when the sync-pulse-out blocking bit, bit 2 of the TOD-clock SS register, is one. When the TOD lock in this CPU is running and the sync-pulse-out blocking bit is zero, the sync-pulse-out line is raised for 1 microsecond every 1,048,576 microseconds. The sync-pulse-out lines in all the interfaces from this CPU are driven from a common source in this CPU and therefore are stepped in synchronism....