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Drive Circuit for Stepping Motor

IP.com Disclosure Number: IPCOM000042500D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-03
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Barcomb, JG: AUTHOR [+3]

Abstract

A drive circuit for a stepping motor for use in a printer is so constructed that the voltage appearing across the control transistors is appreciably reduced as compared with known circuits. The figure illustrates the circuit diagrammatically. The coils 1,2 of a stepping motor are coupled to a voltage source Vs (of 32 volts) through transistors T1,T3 and to ground through transistors T2,T4 in series with a 0.4-ohm resistor R. Transistors T1,T3 are by- passed by diodes D1,D3, respectively. The ends of coils 1,2 remote from the source Vs are connected to ground through diodes D2,D4. The ends of coils 1,2 are also connected to ground and a reference voltage equal to Vs through diodes D5,D6,D7,D8, as illustrated. Coils 1,2 are bifilar wound and have a mutual inductance approximately 1:1.

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Drive Circuit for Stepping Motor

A drive circuit for a stepping motor for use in a printer is so constructed that the voltage appearing across the control transistors is appreciably reduced as compared with known circuits. The figure illustrates the circuit diagrammatically. The coils 1,2 of a stepping motor are coupled to a voltage source Vs (of 32 volts) through transistors T1,T3 and to ground through transistors T2,T4 in series with a
0.4-ohm resistor R. Transistors T1,T3 are by- passed by diodes D1,D3, respectively. The ends of coils 1,2 remote from the source Vs are connected to ground through diodes D2,D4. The ends of coils 1,2 are also connected to ground and a reference voltage equal to Vs through diodes D5,D6,D7,D8, as illustrated. Coils 1,2 are bifilar wound and have a mutual inductance approximately 1:1. The voltage across R is compared with Vref in an operational amplifier OA. A trigger TR is supplied with the output of OA and with a 25 KHz clock signal. In operation, control signals on Phase A, NOT Phase A are selectively supplied to transistors T1,T2,T3,T4 through AND gates G1, G3 and buffer blocks G2,G4, as illustrated. A Phase A signal will cause both T1,T2 to be turned ON and a current I will flow through coil 1. When I x 0.4 = Vref, OA will reset TR which will turn T1 OFF. Current will continue to flow in coil 1 through D5, T2 and R. At this time the voltage across T1 will be (Vs + one diode drop, approx Vs + 1 volt). The current through coil 1 will decrease slightly until the next clock pulse to TR which will cause T1 to turn ON...