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Three-Dimensional Quiteron Package

IP.com Disclosure Number: IPCOM000042541D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 3 page(s) / 37K

Publishing Venue

IBM

Related People

Faris, SM: AUTHOR [+3]

Abstract

Arraying Quiteron devices vertically as well as horizontally in a multilayer package, and cooling the package with superfluid helium, allows for a manufacturable, very densely packed logic for computer and related applications. The ultimate goal in computing is to realize a system with minimum propagation delay. If such a system is made of several chips, one has the problem of propagation delay not only on the chip, but also on the package connecting them. Obviously, the ultimate goal is to have one chip to implement the whole general-purpose computer. This guarantees shortest delay. However, in order to achieve goal performances, the architects specify a total number of logic circuits and cache memory capacity that may require more than 10 million devices on that single chip.

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Three-Dimensional Quiteron Package

Arraying Quiteron devices vertically as well as horizontally in a multilayer package, and cooling the package with superfluid helium, allows for a manufacturable, very densely packed logic for computer and related applications. The ultimate goal in computing is to realize a system with minimum propagation delay. If such a system is made of several chips, one has the problem of propagation delay not only on the chip, but also on the package connecting them. Obviously, the ultimate goal is to have one chip to implement the whole general- purpose computer. This guarantees shortest delay. However, in order to achieve goal performances, the architects specify a total number of logic circuits and cache memory capacity that may require more than 10 million devices on that single chip. It is not possible to place this large number of devices in a planar arrangement using conventional VLSI techniques. Clearly, in order to realize the shortest delays in packaging such a large number of devices, a three- dimensional arrangement is necessary; i.e., one device plane is placed directly on another device plane with the means provided to interconnect such planes. This article describes a new concept in fabricating dense chips, allowing multi- device planes to be placed on each other, and the means to interconnect such planes. This is realized by exploiting Quiteron technology for the following reasons: 1. It cannot be done with semiconducting technologies because of difficulties encountered in making crystalline planes. 2. Interconnections and via holes have non-zero resistance using conventional technology. 3. One cannot implement this package with conventional technology because of high power dissipation. 4. Quiteron technology affords zero resistance interconnection between planes and in the planes. 5. Quiterons are constructed of evaporated films which do not have to be crystalline and, therefore, the fabrication of an indefinitely large number of layers is possible. 6. Superconducting films of a 500 ~ - 1000...