Browse Prior Art Database

High Voltage Switch

IP.com Disclosure Number: IPCOM000042553D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Hutson, DJ: AUTHOR

Abstract

Field-effect transistors of the VMOS type can be stacked to achieve high-speed switching of voltages exceeding individual breakdown ratings. Referring to Fig. 1, VMOS transistors 1, each in series with a current-limiting resistor 2, are arranged in two banks, with the banks alternately turned on to change the voltage applied to load terminal 3. Resistors 4, one in parallel with each transistor, are connected in series in each bank to divide the total DC off voltage into equal voltages less than the breakdown value of the individual transistors 1. The high value of resistors 4 is limited by the off leakage current of (Image Omitted) the voltage breakdown is not exceeded. Turn-on time is controlled by the time constant of resistors 2 and capacitors 5, and resistors 8 and the transistor capacitance.

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High Voltage Switch

Field-effect transistors of the VMOS type can be stacked to achieve high-speed switching of voltages exceeding individual breakdown ratings. Referring to Fig. 1, VMOS transistors 1, each in series with a current-limiting resistor 2, are arranged in two banks, with the banks alternately turned on to change the voltage applied to load terminal 3. Resistors 4, one in parallel with each transistor, are connected in series in each bank to divide the total DC off voltage into equal voltages less than the breakdown value of the individual transistors 1. The high value of resistors 4 is limited by the off leakage current of

(Image Omitted)

the voltage breakdown is not exceeded. Turn-on time is controlled by the time constant of resistors 2 and capacitors 5, and resistors 8 and the transistor capacitance. The floating gate drive circuits are shown in Figs. 2 and 3 and incorporate transistor switch 9, CMOS Schmitt trigger 10 and optical coupler 11. A logic control circuit for the transistor banks is shown in Fig. 4.

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