Browse Prior Art Database

Bidirectional Interface

IP.com Disclosure Number: IPCOM000042571D
Original Publication Date: 1984-May-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Bucelot, TJ: AUTHOR [+3]

Abstract

A programmable tri-functional circuit serves as a bidirectional interface between the voltage and frequency domains of very small signal, very high speed, advanced VLSI circuits, such as Josephson junction circuits (which operate at temperatures near absolute zero) and room temperature circuits implemented in semiconductor technology. The bidirectional interface is a programmable tri-functional circuit. It can be configured (receive mode) as a low level high frequency receiver. It can also be a passive driver (drive mode) which is driven from conventional drive circuitry. The third mode (sense-while-drive- mode) is a simultaneous receive and drive function. It allows a parametric resistance measurement which can be useful for low level, high frequency device port characterization or contact verification testing.

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Bidirectional Interface

A programmable tri-functional circuit serves as a bidirectional interface between the voltage and frequency domains of very small signal, very high speed, advanced VLSI circuits, such as Josephson junction circuits (which operate at temperatures near absolute zero) and room temperature circuits implemented in semiconductor technology. The bidirectional interface is a programmable tri- functional circuit. It can be configured (receive mode) as a low level high frequency receiver. It can also be a passive driver (drive mode) which is driven from conventional drive circuitry. The third mode (sense-while-drive- mode) is a simultaneous receive and drive function. It allows a parametric resistance measurement which can be useful for low level, high frequency device port characterization or contact verification testing. Receive Mode Receive mode circuit concepts are illustrated in Figs. 1A and 1B. The low level, high frequency signal is applied to point A. It is amplified by 100X AC amplifier Q1, Q2, Q3 and appears at the input point B of the amplitude discriminator. The amplitude discriminator consists of a fast comparator, a frequency divider, and a retriggerable single-shot. An external reference voltage is applied to the amplitude discriminator comparator. At point B, a high frequency signal which exceeds the reference threshold will cause signal detection and will cause the comparator emitter coupled logic (ECL) output level to change states at the frequency of the input signal. This detected signal C is divided in frequency D and triggers the single-shot, whose ECL output pulse duration E is programmable by capacitor C11. The output pulse is directed through solid-state switch Q8 to conventional logic inputs. Drive Mode Drive mode circuit concepts are shown in Fig. 2. Conventional logic output signals at point C are coupled to low level, high frequency device inputs at point A through soli...