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Converter Regulation at the Primary

IP.com Disclosure Number: IPCOM000042641D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 4 page(s) / 42K

Publishing Venue

IBM

Related People

Nazario, JL: AUTHOR [+2]

Abstract

The switching converter shown is regulated by sensing the voltage across inductor 5 in the primary. Inductor 5 has a high voltage directly corresponding to the output voltage. This avoids a feedback between the input and the output, which would require isolation for physical safety. A relatively constant voltage VI is applied across lines 1 and 3 as an input voltage. VI is a relatively steady-state direct current voltage, which typically is a crudely rectified signal from a standard, alternating current power source. This may be entirely standard and conventional. Line 1 connects to inductor 5, and the output of inductor 5 connects to one side of capacitor 7 and to an FET switch 9. This circuit point is labeled node A on the drawing. The opposite side of capacitor 7 is connected to the primary of transformer 11.

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Converter Regulation at the Primary

The switching converter shown is regulated by sensing the voltage across inductor 5 in the primary. Inductor 5 has a high voltage directly corresponding to the output voltage. This avoids a feedback between the input and the output, which would require isolation for physical safety. A relatively constant voltage VI is applied across lines 1 and 3 as an input voltage. VI is a relatively steady-state direct current voltage, which typically is a crudely rectified signal from a standard, alternating current power source. This may be entirely standard and conventional. Line 1 connects to inductor 5, and the output of inductor 5 connects to one side of capacitor 7 and to an FET switch 9. This circuit point is labeled node A on the drawing. The opposite side of capacitor 7 is connected to the primary of transformer 11. The secondary of transistor 11 is connected to one side of capacitor 13. Transformer 11, as shown by the conventional symbolism of dots on the drawing, is wound so that the polarity of a signal to the primary is reversed at the secondary. Transformer 11 has a one-to-one turns ratio, although other ratios are similarly operative. The other side of capacitor 13 is connected to one side of a diode 15 and to one side of an inductor 17. Diode 15 is connected in polarity to achieve circuit operation, as will be subsequently described in detail. The other side of inductor 17 is connected to line 19, which constitutes the output of the power supply. That output has a voltage VO which appears across line 19 and line 21; line 21 is connected to the remaining side of the secondary of transformer 11, to the remaining side of diode 15, and to one side of capacitor 23. The other side of capacitor 23 is connected to line 19. Line 25, connected to node A, and line 27 connected to line 1 brings the voltage, which is across inductor 5, across capacitor 29. Line 25 contains diode 31 of a polarity to prevent the discharge of capacitor 29 across inductor 5 after it has been charged to the higher voltage on node A. The voltage across capacitor 29, denoted VC, is applied to the controller subcircuit 33 which converts VC to pulse- width modulation corresponding to the magnitude of VC. This output is applied on line 35 to the gate of FET 9 to thereby provide the basic control of the level of output of the circuit. Controller 33 is entirely standard circuitry, which may be purchased as an independent circuit module. Controller 33 simply responds to a direct current input to produce pulse-width modulation wherein the given, fixed time period is divided into an up period and a down period of different lengths depending on the level of VC. Such circuits require electrical power input, which typically may be readily generated from the same power source from which VI is generated. Such a source of input power is employed in accordance with this invention since controller 33 is necessarily isolated by transformer 11 fr...