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Parallel Attribute Processing in CRT Display System

IP.com Disclosure Number: IPCOM000042657D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Kummer, DA: AUTHOR [+5]

Abstract

In a CRT display system, attribute information is combined with the display data stream prior to serialization of the display data. OR circuits 2 combine a byte of display data from latch 1 with an underline or cursor attribute from OR circuit 3. AND circuits 4 combine each byte output from OR circuits 2 with the output of AND circuit 7 which provides a signal at the blink rate in response to a blink attribute signal. The outputs of AND circuits 4 are then exclusively ORed with a reverse attribute in XOR circuits 5 and applied to a shift register 6 which provides a serial video bit stream. This parallel attribute processing has advantages over the prior serial attribute processing systems in that the processing is performed at the character, rather than bit, rate and critical timing paths are therefore eliminated.

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Parallel Attribute Processing in CRT Display System

In a CRT display system, attribute information is combined with the display data stream prior to serialization of the display data. OR circuits 2 combine a byte of display data from latch 1 with an underline or cursor attribute from OR circuit 3. AND circuits 4 combine each byte output from OR circuits 2 with the output of AND circuit 7 which provides a signal at the blink rate in response to a blink attribute signal. The outputs of AND circuits 4 are then exclusively ORed with a reverse attribute in XOR circuits 5 and applied to a shift register 6 which provides a serial video bit stream. This parallel attribute processing has advantages over the prior serial attribute processing systems in that the processing is performed at the character, rather than bit, rate and critical timing paths are therefore eliminated.

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