Browse Prior Art Database

Battery Backup Level Stabilization

IP.com Disclosure Number: IPCOM000042673D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Greer, WM: AUTHOR

Abstract

The circuit shown provides protection of random-access memory (RAM) 1 against voltage increases experienced when current through diode 3 from main power is low. Diode 5 isolates battery 7 when V1, at the junction of RAM 1 and the collector of bipolar transistor 9, is higher than the voltage of battery 7. V1 is supplied from V2 of main power through diode 3. V3 of main power is connected to the base of transistor 9. V3 is a reference level a diode drop below V2. Resistor 11 is connected from the emitter of transistor 7 to ground and is set at a value to draw current sufficient to bring diode 3 into its normal operating range, thereby preventing an increase in voltage when RAM 1 draws very low currents. Loss of main power renders transistor 9 non-conductive so that battery 7 is not drained through resistor 11.

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Battery Backup Level Stabilization

The circuit shown provides protection of random-access memory (RAM) 1 against voltage increases experienced when current through diode 3 from main power is low. Diode 5 isolates battery 7 when V1, at the junction of RAM 1 and the collector of bipolar transistor 9, is higher than the voltage of battery 7. V1 is supplied from V2 of main power through diode 3. V3 of main power is connected to the base of transistor 9. V3 is a reference level a diode drop below V2. Resistor 11 is connected from the emitter of transistor 7 to ground and is set at a value to draw current sufficient to bring diode 3 into its normal operating range, thereby preventing an increase in voltage when RAM 1 draws very low currents. Loss of main power renders transistor 9 non-conductive so that battery 7 is not drained through resistor 11. Low power memories, such as complementary metal oxide semiconductor (CMOS) memories, can be supported by batteries when in an unaccessed mode, but require substantial currents when in use. This requirement makes it undesirable to supply normal operating current from batteries. Memories are operated from main power normally, while batteries are used as auxiliary power sufficient to protect data stored in memory upon loss of main power. A battery is connected across the memory, such as RAM 1, in series with a diode, such as diode 5, connected to normally isolate battery 7. In the circuit shown, when main power is operative, th...