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Browse Prior Art Database

Polysilicon Resistor Process

IP.com Disclosure Number: IPCOM000042686D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Choi, MS: AUTHOR [+2]

Abstract

It is a well known fact that considerable improvement in both chip density (greater than 20%) and performance can be obtained by the replacement of a single crystal silicon resistor by a higher sheet rho polysilicon resistor. There are several other advantages of using polysilicon resistors: Polysilicon resistors can be placed over the ROI (recessed oxide isolation) rather than in the EPI, giving added increase in the chip density; and the capacitance of polysilicon resistors over ROI is considerably reduced over the conventional I/I (ion implanted) resistors. By contrast, high Rs (sheet resistance) I/I single crystal silicon resistors cannot be obtained with extensions of conventional processes. This is because the relatively highly doped epitaxial layers make Rs control extremely difficult.

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Polysilicon Resistor Process

It is a well known fact that considerable improvement in both chip density (greater than 20%) and performance can be obtained by the replacement of a single crystal silicon resistor by a higher sheet rho polysilicon resistor. There are several other advantages of using polysilicon resistors: Polysilicon resistors can be placed over the ROI (recessed oxide isolation) rather than in the EPI, giving added increase in the chip density; and the capacitance of polysilicon resistors over ROI is considerably reduced over the conventional I/I (ion implanted) resistors. By contrast, high Rs (sheet resistance) I/I single crystal silicon resistors cannot be obtained with extensions of conventional processes. This is because the relatively highly doped epitaxial layers make Rs control extremely difficult. In addition, the TCR (temperature coefficient of resistance) of single crystal resistors increases very fast as a function of Rs. Proposed here is a compatible polysilicon resistor process. The outline of the process is as follows: 1. Initial oxidation 2. Base contact P/R (photoresist) and etch 3. Base CVD (chemical vapor deposited) polysilicon deposition 4. Polysilicon oxidation (or CVD oxide) 5. Resistor ion implant (Optional block-out mask required for the extrinsic base region if double I/I is required. This prevents phosphorus in base region.) 6. Base P/R (block-out mask); block out polysi (polysilicon) resistors 7. Extrinsic base ion implan...