Browse Prior Art Database

Handling of Hardware Errors Detected by a Line Scanner in a Communication Controller

IP.com Disclosure Number: IPCOM000042700D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Calvignac, J: AUTHOR [+4]

Abstract

In a communication controller such as that shown in the drawing, line scanners scan the lines sequentially and process each line adequately. If a hardware error is detected on one line, it has to be signalled to the communication scanner processor (CSP) which controls the line. According to this proposal, this is done without slowing down the normal processing of lines which are not in error. In order to signal a hardware error, the scanner makes an interrupt request to the microprocessor at the normal working level (level 2). Thus, the microprocessor does not have to handle a level O interrupt request (highest priority level), which saves processing time. Furthermore, the scanner uses the circuits which are provided to signal a normal operation event. In the scanner, two external registers are used to this end.

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Handling of Hardware Errors Detected by a Line Scanner in a Communication Controller

In a communication controller such as that shown in the drawing, line scanners scan the lines sequentially and process each line adequately. If a hardware error is detected on one line, it has to be signalled to the communication scanner processor (CSP) which controls the line. According to this proposal, this is done without slowing down the normal processing of lines which are not in error. In order to signal a hardware error, the scanner makes an interrupt request to the microprocessor at the normal working level (level 2). Thus, the microprocessor does not have to handle a level O interrupt request (highest priority level), which saves processing time. Furthermore, the scanner uses the circuits which are provided to signal a normal operation event. In the scanner, two external registers are used to this end. The first one is the interrupt register where the microprocessor can find the line number from which the interrupt request emanates. This allows the line in error to be isolated, and if the error is found permanent, the line can be stopped while the processing of other lines continues. The second one is an extended interrupt request register wherein the reason of the interruption is stored. In the scanners, random-access memories (RAMs) are provided for storing the information necessary to handle the exchange of data between the terminals connected to the lines and the ce...