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Browse Prior Art Database

Clocked Chopper With High Noise Immunity to Cycle Skipping

IP.com Disclosure Number: IPCOM000042788D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Frankeny, RF: AUTHOR

Abstract

This chopper circuit for driving a stepper motor offers the simplicity of a single comparator design with the precise frequency control of a clocked chopper with high noise immunity. The PHASE SELECT signal enables one of the inputs of NAND G1 and drives the base of transistor Q2. When a clock pulse occurs, a voltage spike is coupled by capacitor C1 to the plus input of comparator CM1. This causes the output of CM1 to rise and stay at an up level because of the positive feedback. The voltage Vr at the positive input of the comparator equals Vspike + Vref R3_ . R1+R2+R3 The comparator remains set until the resistance of resistor Rs times Is, the current through Rs, equals Vr. When the output of CM1 rises, the output of G1 goes to a low level which turns on transistor Q1.

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Clocked Chopper With High Noise Immunity to Cycle Skipping

This chopper circuit for driving a stepper motor offers the simplicity of a single comparator design with the precise frequency control of a clocked chopper with high noise immunity. The PHASE SELECT signal enables one of the inputs of NAND G1 and drives the base of transistor Q2. When a clock pulse occurs, a voltage spike is coupled by capacitor C1 to the plus input of comparator CM1. This causes the output of CM1 to rise and stay at an up level because of the positive feedback. The voltage Vr at the positive input of the comparator equals Vspike + Vref R3_ . R1+R2+R3 The comparator remains set until the resistance of resistor Rs times Is, the current through Rs, equals Vr. When the output of CM1 rises, the output of G1 goes to a low level which turns on transistor Q1. During the transient time, Vr has Vspike superimposed so that a large voltage differential exists at the input of CM1. This prevents the latching function of CM1 from being reset before current switching takes place in Q1 and Q2. The time constant C1 times R3 is much shorter than the charge time of the motor winding inductor L1, but longer than the switching time of the Q1 chopper transistor. Once the spike has decayed, normal operation proceeds until Is times Rs is equal to or greater than Vr, at which time the comparator output goes low.

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