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Charge-Pump Summing Network

IP.com Disclosure Number: IPCOM000042797D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Boyd, JB: AUTHOR [+3]

Abstract

In the personal computer market, the requirement for a single +5-volt power supply is becoming mandatory. This requirement is particularly limiting in the area of phase-locked loops for peripheral magnetic storage devices. The circuit described implements a charge-pump summing network which is part of a +5-volt only phase-locked loop. In Fig. 1, the charge-pump summing network 10 is used to reference a nominal filter control input 12 to a reference voltage node 13. This is accomplished by shorting input 12 to node 13 and adjusting potentiometer 14 until the summing output 15 from summing amplifier 10 drives voltage-controlled oscillator (VCO) 16 to nominal operating frequency.

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Charge-Pump Summing Network

In the personal computer market, the requirement for a single +5-volt power supply is becoming mandatory. This requirement is particularly limiting in the area of phase-locked loops for peripheral magnetic storage devices. The circuit described implements a charge-pump summing network which is part of a +5-volt only phase-locked loop. In Fig. 1, the charge-pump summing network 10 is used to reference a nominal filter control input 12 to a reference voltage node 13. This is accomplished by shorting input 12 to node 13 and adjusting potentiometer 14 until the summing output 15 from summing amplifier 10 drives voltage-controlled oscillator (VCO) 16 to nominal operating frequency. In normal operation, the short is removed and the filter voltage at input 12 swings about the nominal value established by the initial adjustment, as described above. The voltage at summing output 15 is converted to frequency by VCO 16. The output of oscillator 16 is passed to a phase detector as required by the phase-locked loop. A way of implementing summing amplifier 10 is shown in Fig. 2. To obtain the sum: Vt = C11*V1a + C12*V2a + ...+C1n*Vna -C21*V1s - C22*V2s - ... - C2m*Vms Voltages Vla through Vna are converted to currents by voltage-to- current converters 1 to 3. Resulting currents I1a through Ina are summed at node A. Current-mirror 7 inputs this summed current IA to node B. Other voltages, Vls through Vms are converted to currents I1s through Ims by c...