Browse Prior Art Database

Digital Motor Speed Control

IP.com Disclosure Number: IPCOM000042805D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 63K

Publishing Venue

IBM

Related People

Gac, JV: AUTHOR [+2]

Abstract

A digital speed control is a pulse-width modulated drive system for either a brush or brushless DC motor. The motor is coupled to an emitter device which generates feedback signals indicative of motor movement. Referring to Figs. 1 and 2, the speed control operates as follows: When start line 10 is pulled down, both accelerate latch 11 and run latch 12 are set. This activates the motor drive input which will start the motor in the open-loop mode. As speed increases, emitter pulses are generated on line 13 to trigger 14 connected with trigger 15 in a manner which forms an edge-catcher circuit. The accurate edge of each emitter pulse will generate a narrow synchronized pulse E(P) on line 16 used to clear the speed reference counter 17 which starts counting up high speed clock pulses on line 18.

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Digital Motor Speed Control

A digital speed control is a pulse-width modulated drive system for either a brush or brushless DC motor. The motor is coupled to an emitter device which generates feedback signals indicative of motor movement. Referring to Figs. 1 and 2, the speed control operates as follows: When start line 10 is pulled down, both accelerate latch 11 and run latch 12 are set. This activates the motor drive input which will start the motor in the open-loop mode. As speed increases, emitter pulses are generated on line 13 to trigger 14 connected with trigger 15 in a manner which forms an edge-catcher circuit. The accurate edge of each emitter pulse will generate a narrow synchronized pulse E(P) on line 16 used to clear the speed reference counter 17 which starts counting up high speed clock pulses on line 18. The next emitter pulse on line 13 clears counter 17 again. The output of counter 17 is connected to speed decode gate 19 which sends out on line 20 to delay latch 21 and delay extend latch 22 a narrow check pulse whose time delay measured from the E(P) signal accurately defines the desirable period or speed. If the emitter pulse is shorter, no check pulse is generated. As the motor continues to accelerate, a monitoring system such as a microprocessor or hardware circuit determines when the desired speed range has been reached sending out an up-to-speed pulse UTS(P) on line 23. This signal resets the latch 11, allowing the motor to operate in closed-loop or feedback mode. The state of latch 22 deter...