Browse Prior Art Database

E-Beam Registration Mark Integrity

IP.com Disclosure Number: IPCOM000042878D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Anderson, G: AUTHOR [+4]

Abstract

One four-level metal personalization process, called VWP (Vertical Wiring Process), requires seven levels of exposure by electron beam tools, including K, L1, L2, M, V1, V2 and X levels. A major problem for E-beam registration occurs at the L2 level and subsequent levels because planarization processes are required at the L3 and V3 etchback levels, which tend to form and/or remove marks created by topography and on which E-beam registration depends. A traditional solution for registration for planar processes has been to include an extra lithography level to clean out the registration mark area, including: 1. a resist coat and bake, 2. exposure of a blockout of the registration mark area, 3. development, 4. an etch to clean out the quartz, and 5. a resist strip.

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E-Beam Registration Mark Integrity

One four-level metal personalization process, called VWP (Vertical Wiring Process), requires seven levels of exposure by electron beam tools, including K, L1, L2, M, V1, V2 and X levels. A major problem for E-beam registration occurs at the L2 level and subsequent levels because planarization processes are required at the L3 and V3 etchback levels, which tend to form and/or remove marks created by topography and on which E-beam registration depends. A traditional solution for registration for planar processes has been to include an extra lithography level to clean out the registration mark area, including: 1. a resist coat and bake, 2. exposure of a blockout of the registration mark area, 3. development, 4. an etch to clean out the quartz, and 5. a resist strip. For multilevel application, this extra lithography step would occur twice, once at L3 level and again at V3 level, resulting in at least 10 extra process steps, and greatly increasing the cost of the product. An alternative to this costly solution is to expose and develop a blockout of the registration mark area before the etchback process at the L3 and V3 levels. Since the resist film and the reactive ion etch are already a part of the etchback process, the only extra process steps involved are the exposure (which can be done optically to decrease costs) and the development. This blockout essentially removes the reactive ion etch mask, and while the rest of the wafer is...