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Necessary and Sufficient Feedback Conditions in Self-Starting Shift Counter Design

IP.com Disclosure Number: IPCOM000042949D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 3 page(s) / 39K

Publishing Venue

IBM

Related People

Ko, MA: AUTHOR

Abstract

This article presents a description of the necessary and sufficient feedback conditions relevant to the proper design of a self-starting shift counter in which redundant logic is avoided. Consideration in Shift Counter Design The shift counter is a versatile and easy-to-use means of controlling waveform generation in systems based on digital logic. Fig. 1 illustrates an example of a 5-stage shift counter output. The allowable output states are a given number of consecutive ones, followed by the same number of consecutives zeros. In conjunction with two-input logic gates, this set of outputs can be used to provide control waveforms of varying width by merely selecting the output that turns the gate ON at the proper time, and a second output to turn it OFF at the correct time.

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Necessary and Sufficient Feedback Conditions in Self-Starting Shift Counter Design

This article presents a description of the necessary and sufficient feedback conditions relevant to the proper design of a self-starting shift counter in which redundant logic is avoided. Consideration in Shift Counter Design The shift counter is a versatile and easy-to-use means of controlling waveform generation in systems based on digital logic. Fig. 1 illustrates an example of a 5-stage shift counter output. The allowable output states are a given number of consecutive ones, followed by the same number of consecutives zeros. In conjunction with two-input logic gates, this set of outputs can be used to provide control waveforms of varying width by merely selecting the output that turns the gate ON at the proper time, and a second output to turn it OFF at the correct time. However, the shift counter must be initialized to a known state, as illustrated in Fig. 2, by the reset signal at the clear input of all the flip-flops. If the count output is not in an allowable state, it might never clock itself into a known state because of the simple feedback mechanism; in other words, it is not self-starting. This makes it prone to malfunction due to noise. Conditions for Self-Start Shift Counter Existing self-starting designs often include redundancy in the feedback logic. This can, however, be avoided by incorporating the necessary and sufficient conditions for creating a self-start shift counter in the design of such a device. Let the number of counter outputs be n. The first counter output state is affected by the last m counter output states. Specifically, the first output is set to one at the next clock if and only if the last m outputs are all zeros; and the first output is set to zero at the next clock if and only if the last m outputs are all ones; otherwise, the first output should retain its present state. It is necessary and sufficient if m is the smallest integer greater than n/3, where n/3 is integer division. The following considerations demonstrate this. If the n outputs do not contain m consecutive identical outputs, then the first output would retain its present state at each clock. Eventually, after n clocks, all n outputs are identical to the initial first output. Thus, the shift counter is initialized. If the specified n outputs contain m consecutive identical outputs, eventually these m...