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Alphanumeric Display Logic

IP.com Disclosure Number: IPCOM000042995D
Original Publication Date: 1984-Jun-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 3 page(s) / 38K

Publishing Venue

IBM

Related People

Canton, DA: AUTHOR

Abstract

The use of video RAMs (random-access memories) for the character buffer in a multipage high function alphanumeric color display is described These are dual ported DRAMs (dynamic random-access memories). One port is used for random access by a microprocessor, and the other port is via a shift register which is loaded with a complete row of array character codes and display attributes in one DRAM cycle and and is connected to screen refresh logic. A conventional design for an alphanumeric display is shown in Fig. 1. This uses a character buffer in which coded information for each character on the screen is stored. This buffer contains the address of the required pel (picture element) patterns in the character generator and also the highlight display information for each character.

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Alphanumeric Display Logic

The use of video RAMs (random-access memories) for the character buffer in a multipage high function alphanumeric color display is described These are dual ported DRAMs (dynamic random-access memories). One port is used for random access by a microprocessor, and the other port is via a shift register which is loaded with a complete row of array character codes and display attributes in one DRAM cycle and and is connected to screen refresh logic. A conventional design for an alphanumeric display is shown in Fig. 1. This uses a character buffer in which coded information for each character on the screen is stored. This buffer contains the address of the required pel (picture element) patterns in the character generator and also the highlight display information for each character. A high function color display requires at least 3 bytes per character. The total size of the buffer depends upon the size of the screen. The largest IBM 3270 display screen has 34 rows of 80 characters plus an indicator row of 80 characters. Hence, the minimum buffer size is 3.5K x 3 bytes (10.5K bytes). However, if the display has to support hardware paging and scrolling, the buffer size must be several times larger. Exactly how much larger depends upon the amount of hardware support that is required, but a figure of 4 full screens of data would be considered reasonable. Such a design would require 48K bytes, with the memory arranged so that it can be accessed by the screen refresh logic as 16K by 3 bytes wide. The character buffer has to be dual ported so that it can be accessed by both the screen refresh logic and by the microprocessor. The two ports must be independent of each other in order to avoid screen scintillation or poor update performance. With current displays both ports have to run at a cycle time of about 400 nsecs. Therefore, a high function, color, multipage display requires a dual ported memory of at least 16K x 3 bytes with a cycle time of 400 nsecs. There are two accepted methods of implementing this using conventional RAM modules. Static RAMs will run with cycle times of less than 200 nsecs. This means that the two ports can be time multiplexed. The disadvantage of static RAMs is that currently they are only available as 2K x 8 bits. Hence, 24 modules will be required. This is a costly solution that also requires a large card area. Also, this design requires data flow support modules to multiplex and latch the two ports. DRAMs are significantly c...