Browse Prior Art Database

Line Signal Quality Detector

IP.com Disclosure Number: IPCOM000043032D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Coburn, RL: AUTHOR

Abstract

This article describes a device which monitors the quality of incoming signals on a communication channel and activates an indicator when the quality of the signal falls below a pre-established level. The device includes an electrical circuit which monitors the phase of an incoming signal and activates a light when said signal falls below the predetermined level. The block diagram depicts the line signal quality detector. The detector includes the phase error detector whose input terminal accepts the incoming data and the output is fed into one leg of a comparator. A reference signal is fed into the other leg of the comparator. The output of the comparator is fed into a "bad" sample counter. Another signal from a message counter or timer is fed into the "bad" sample counter.

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Line Signal Quality Detector

This article describes a device which monitors the quality of incoming signals on a communication channel and activates an indicator when the quality of the signal falls below a pre-established level. The device includes an electrical circuit which monitors the phase of an incoming signal and activates a light when said signal falls below the predetermined level. The block diagram depicts the line signal quality detector. The detector includes the phase error detector whose input terminal accepts the incoming data and the output is fed into one leg of a comparator. A reference signal is fed into the other leg of the comparator. The output of the comparator is fed into a "bad" sample counter. Another signal from a message counter or timer is fed into the "bad" sample counter. The output from the "bad" sample counter is used to activate the light poor quality indicator. In operation, the data transmissions are compared to the phase-locked loop (PLL) clock signal (not shown) and a proportional correctional signal sample (d sample)is generated. The generated signal is used to address the PLL to keep it in phase with the data. When the line signal is of poor quality, especially when it is likely to cause an error, the phase will be jumping around. This phase sample can be compared to a window around zero. When the magnitude of the sample phase error exceeds the window, the counter is incremented. If the count reaches a preset level during...