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Self-Aligned Bipolar Transistor

IP.com Disclosure Number: IPCOM000043059D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 91K

Publishing Venue

IBM

Related People

Shepard, JF: AUTHOR

Abstract

Figs. 1 through 4 illustrate the making of a vertical PNP bipolar transistor. Fig. 1 illustrates a subcollector 60 which has been formed upon a substrate (not shown). The substrate can be of any desired conductivity but is typically N-. Also formed is the P- epitaxial layer 62 on the silicon semiconductor substrate. Within the epitaxial layer has been formed by either conventional ion implantation or diffusion processes a P+ reach-through region 64. The surface layers have insulating layer 66 which is typically silicon dioxide, polycrystalline silicon N+ layer 68 and a second insulating layer 70 over the polycrystalline silicon layer 68.

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Self-Aligned Bipolar Transistor

Figs. 1 through 4 illustrate the making of a vertical PNP bipolar transistor. Fig. 1 illustrates a subcollector 60 which has been formed upon a substrate (not shown). The substrate can be of any desired conductivity but is typically N-. Also formed is the P- epitaxial layer 62 on the silicon semiconductor substrate. Within the epitaxial layer has been formed by either conventional ion implantation or diffusion processes a P+ reach-through region 64. The surface layers have insulating layer 66 which is typically silicon dioxide, polycrystalline silicon N+ layer 68 and a second insulating layer 70 over the polycrystalline silicon layer 68. N+ vertical conformal conductive layers 72 have been formed by chemical vapor deposition and then an anisotropic reactive ion etching step to make contact between the horizontal layer 68 and the PN junction regions 74, as shown in Fig.
1. The PN junction regions 74 are made by outdiffusion from the N regions 72. The outdiffusion from the N vertical conductive layer 72 in the area of the P+ reach-through region 64 is not sufficient in a quantity of N type dopant to overcome the P+ conductivity of the region 64. The Fig. 1 structure is subjected to thermal oxidation to form silicon dioxide layer 76 over the vertical conductive layers. Alternatively, a chemical vapor deposition of an insulator, such as silicon dioxide or a combination of silicon dioxide with other insulators, can be blanket deposited,...