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Fabrication of Superconductive Transistors

IP.com Disclosure Number: IPCOM000043170D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 3 page(s) / 65K

Publishing Venue

IBM

Related People

Cuomo, J: AUTHOR [+3]

Abstract

A three-terminal superconducting transistor can be made by the fabrication of a superconductor semimetal superconductor sandwich wherein current is electronically injected to introduce either electrons or holes for altering the energy barrier height of the semimetal. To the extent that the energy barrier height is changed, the RNN of the device changes radically. Without injected carriers the resistance is high, but with injected carriers the resistance is low. This is an inverting device having nonlatching characteristics. This article describes simple processing techniques using vacuum evaporation and photolithography for fast and inexpensive fabrication of the superconducting transistor.

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Fabrication of Superconductive Transistors

A three-terminal superconducting transistor can be made by the fabrication of a superconductor semimetal superconductor sandwich wherein current is electronically injected to introduce either electrons or holes for altering the energy barrier height of the semimetal. To the extent that the energy barrier height is changed, the RNN of the device changes radically. Without injected carriers the resistance is high, but with injected carriers the resistance is low. This is an inverting device having nonlatching characteristics.

This article describes simple processing techniques using vacuum evaporation and photolithography for fast and inexpensive fabrication of the superconducting transistor. These fabrication techniques can be separated into two categories: (1) direct connection methods in which the third electrode contacts the tunneling medium directly; and (2) field-induced methods in which the third electrode is separated from the tunneling medium by thin oxide.

Direct Connection Techniques Technique A (Figs. A.1 A.6) 1. Deposit a film 10 of GeSn or other barrier material onto a clean insulating substrate 12, such as sapphire (Fig. A.1). 2. Using a fine line fabrication technique, form thin Al lines 14 (about 400 ) on the GeSn (Fig. A.2). 3. Aluminum line 14 is employed as an etching mask, and the unprotected GeSn or other barrier material is removed using ion beam etching (Fig. A.3). 4. Using evaporation, the electrode metal 16 is next deposited. This metal could be a superconductor, such as Pb, Sn or Nb (Fig. A.4). 5. Aluminum line 14 is removed using a suitable chemical etchant (Fig. A.5). 6.

Using photolithography and either wet chemical or ion beam etching, the electrode metal 16 is patterned to provide four-contact electrodes 16A-16D. A top view of the resulting structure is shown in Fig. A.6. Technique B (Figs. B.1 - B.5) Repeat steps 1 through 5 from technique A, leaving barrier material 10 (approximately 400-500 wide) and electrode metal 16. 6. Using photolithography and either wet chemical or ion beam etching, pattern the electrode metal 16, as in Fig. B.1 (top view). 7. Nb electrodes 16 are next anodized, as shown in cross section in Fig. B.2, to form Nb oxide layer 18. 8.

A photoresist mask 20, prepared for lift-off, is next applied to the structure (Fig. B.3). 9. The third electrode 22 (Pb, Sn, or Nb) is deposited through lift-off mask 20 using evaporation (Fig. B.4). 10.

The photoresist and undesired electrode material are next removed. Fig. B.5 is a top view and cross-section of view of the resulting structu...