Browse Prior Art Database

Patch Card Fault Detection

IP.com Disclosure Number: IPCOM000043180D
Original Publication Date: 1984-Jul-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 1 page(s) / 13K

Publishing Venue

IBM

Related People

Johnson, JS: AUTHOR [+3]

Abstract

Errors in the program stores of microprocessors, when such stores are read-only, are by passed by patching in additional memory units in such a way that, when a known faulty area of the normal storage facility is addressed, a corresponding area of the additional memory facility is accessed instead. Such additional memory is added to the basic microprocessor configuration on a separate card, known as a patch card. Since patch cards may not be fitted as standard, patch card faults are not normally detected and identified by the normal error monitoring facilities, provided in such microprocessors, these facilities including, inter alia, error counters provided in non-volatile addressable normal storage in the microprocessor hardware.

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Patch Card Fault Detection

Errors in the program stores of microprocessors, when such stores are read- only, are by passed by patching in additional memory units in such a way that, when a known faulty area of the normal storage facility is addressed, a corresponding area of the additional memory facility is accessed instead. Such additional memory is added to the basic microprocessor configuration on a separate card, known as a patch card. Since patch cards may not be fitted as standard, patch card faults are not normally detected and identified by the normal error monitoring facilities, provided in such microprocessors, these facilities including, inter alia, error counters provided in non-volatile addressable normal storage in the microprocessor hardware. Patch memory units, sufficient to correct all errors will be provided on the patch card, incorporating a directory for detecting that the currently presented memory address relates to a patched area and correspondingly actuating the appropriate patch. Patch card testing can be undertaken in two stages, of which the first stage only may prove to be necessary. Stage 1 The patch card includes a patch, for one of the error counters that is not used, i.e., one not addressed by the programming that is being patched, but which can be addressed by test programs for display purposes. Such an error counter will contain zero, unless it, itself, is in error. Its patch sets the error counter to some other value. Thus, in test mode, a display of zero for this counter indicates some unspecified fault in the patch card and its memory units. A display of a value other than the one to which the patch is set, assuming this value to be known, will indicate an error in the patch operation. Stage 2 In order to distinguish between faults in the patch memory units, typically programmable...