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Browse Prior Art Database

Less-Than Decoder

IP.com Disclosure Number: IPCOM000043279D
Original Publication Date: 1984-Aug-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Matick, RE: AUTHOR

Abstract

This article relates to a MACRO-type circuit for a "less than" decoder which can be used in many places for VLSI system designs. More particularly, a macro is described which provides circuits for a new function to do what was previously done with several functions. This MACRO is for a "less-than decoder", but it can also be used as a "less-than or equal", "greater-than", or "greater-than or equal" decoder. The basic logic circuits in terms of AND and OR gates for achieving 3 of the above 4 cases are shown in Figs. 1, 2 and 3. The essential idea is as follows. A 16-bit "less-than" decoder, as in Fig. 1, must have a 4-bit input address A1A2A3A4, as shown. If the given binary address is, say, 3 (decimal 4), then the decoder will place a binary 1 in all bit positions less than binary 3 (i.e., less than the fourth position).

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Less-Than Decoder

This article relates to a MACRO-type circuit for a "less than" decoder which can be used in many places for VLSI system designs. More particularly, a macro is described which provides circuits for a new function to do what was previously done with several functions. This MACRO is for a "less-than decoder", but it can also be used as a "less-than or equal", "greater-than", or "greater-than or equal" decoder. The basic logic circuits in terms of AND and OR gates for achieving 3 of the above 4 cases are shown in Figs. 1, 2 and 3. The essential idea is as follows. A 16-bit "less-than" decoder, as in Fig. 1, must have a 4-bit input address A1A2A3A4, as shown. If the given binary address is, say, 3 (decimal 4), then the decoder will place a binary 1 in all bit positions less than binary 3 (i.e., less than the fourth position). All other bit positions will be 0. Likewise, if binary address 8 is given, all binary bit positions 0 through 7 will have a 1 while all the remaining will be 0. This is unlike an ordinary decoder where a given address produces an output at only that one position. The MACRO can find general use in microprocessors as well as large CPUs. For instance, a typical processor operation is to generate a MASK which is subsequently combined logically (AND, OR, etc.) with other data. The mask is typically generated by the use of IMMEDIATE data in an instruction, or by individually setting bits in a register. Both of these methods are quite...