Browse Prior Art Database

Display Terminal to TV Monitor Adapter

IP.com Disclosure Number: IPCOM000043383D
Original Publication Date: 1984-Aug-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Nodot, JC: AUTHOR

Abstract

Shown in the figure is an adapter circuit that permits the contents of the screen of a workstation, and more particularly that of an IBM 6580 display terminal, to be displayed on one or more TV monitors. The horizontal and vertical synchronization pulses, Synchro H and Synchro V, from the display terminal are respectively applied to single-shots SS1 and SS2 which convert them into pulses that are compatible to TV standards. Typically, to be in compliance with United States TV standards the widths of the output pulses from SS1 and SS2 are 4.6 and 180 microseconds, respectively. The output signals from SS1 and SS2 are combined by a set of four NAND gates 10-13 to provide a TV composite synchronization signal which is applied to the base of transistor Q1.

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Display Terminal to TV Monitor Adapter

Shown in the figure is an adapter circuit that permits the contents of the screen of a workstation, and more particularly that of an IBM 6580 display terminal, to be displayed on one or more TV monitors. The horizontal and vertical synchronization pulses, Synchro H and Synchro V, from the display terminal are respectively applied to single-shots SS1 and SS2 which convert them into pulses that are compatible to TV standards. Typically, to be in compliance with United States TV standards the widths of the output pulses from SS1 and SS2 are 4.6 and 180 microseconds, respectively. The output signals from SS1 and SS2 are combined by a set of four NAND gates 10-13 to provide a TV composite synchronization signal which is applied to the base of transistor Q1. The video signal from the display terminal is applied to the base of transistor Q3 through resistor R1 whose value is selected to provide a 70% video signal in the adapter output signal. Transistors Q1 and Q2 behave as current switches through resistors R1, R2 and R3. The values of resistors R2 and R3 are selected to provide a 30% synchronization signal in the adapter output signal. The voltage at the node common to resistors R2 and R3 is approximately 1.2 volts (black level) when transistor Q2 is conducting, and 0 volt when transistor Q2 is not conducting. Transistor Q3 is an output driver stage which provides a 1-volt peak- to-peak TV signal across a 75-ohm load. Resistor R4...