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Receiver Circuit With External Threshold Voltage Adjustment

IP.com Disclosure Number: IPCOM000043402D
Original Publication Date: 1984-Aug-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Askin, HO: AUTHOR [+2]

Abstract

The circuit shown in Fig. 1 translates off-chip signal voltage levels to on-chip voltage levels, the output remaining in phase with respect to the input. By its use, receiver threshold variations (normally a function of process parameters and temperature) are compensated for through a positive power supply voltage adjustment in the following manner. Transistor T2, with its associated components, forms a DTL (diode-transistor logic) like output buffer, assuring voltage levels compatible with DTL signal levels. Transistor T1, a "free" (it can be partially integrated into the structure of T2 without additional process steps) PNP, performs the actual voltage level translation. Diode D1 and resistor R1 isolate the base of T1 from the off-chip (input) line. When the input is high, T1 has no VBE and therefore is turned off.

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Receiver Circuit With External Threshold Voltage Adjustment

The circuit shown in Fig. 1 translates off-chip signal voltage levels to on-chip voltage levels, the output remaining in phase with respect to the input. By its use, receiver threshold variations (normally a function of process parameters and temperature) are compensated for through a positive power supply voltage adjustment in the following manner. Transistor T2, with its associated components, forms a DTL (diode-transistor logic) like output buffer, assuring voltage levels compatible with DTL signal levels. Transistor T1, a "free" (it can be partially integrated into the structure of T2 without additional process steps) PNP, performs the actual voltage level translation. Diode D1 and resistor R1 isolate the base of T1 from the off-chip (input) line. When the input is high, T1 has no VBE and therefore is turned off. Resistor R2 assures that the base of transistor T2 is low so that the output of the circuit is high. If the input is low, diode D1 is reverse biased, isolating the input from T1 . Resistor R1 pulls the base of T1 low so that T1 will turn on. This brings the base of T2 high, thereby bringing the output low. The threshold for high-to-low input transitions is set by the voltage VCONT on the emitter of T1 . A typical VCONT generator circuit is shown in Fig.
2. This circuit provides a constant voltage value for VCONT, where VCONT = (R1+R2)VBE Alternatively, VCONT could be generated by tieing it t...