Browse Prior Art Database

I/O Mapped Memory

IP.com Disclosure Number: IPCOM000043403D
Original Publication Date: 1984-Aug-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Deloney, RH: AUTHOR [+3]

Abstract

Memory mapped input/output (I/O) is well known wherein an input/output device buffer appears to the processor as a memory location. This permits memory instructions to be used for I/O operations. Examples are keyboard buffers and display buffers as used in many microprocessor- controlled keyboard display terminals. This article contemplates I/O mapped memory which is the opposite of the concept described above. In I/O mapped memory, any one of up to 256 bytes of a memory chip can be accessed using I/O instructions. This disclosure is useful in those microprocessor architectures, such as the Intel 8085, where a 3-byte instruction is required to access random-access memory for often used variables. With 3-byte instruction memory access, a large amount of read-only storage is required for program storage.

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I/O Mapped Memory

Memory mapped input/output (I/O) is well known wherein an input/output device buffer appears to the processor as a memory location. This permits memory instructions to be used for I/O operations. Examples are keyboard buffers and display buffers as used in many microprocessor- controlled keyboard display terminals. This article contemplates I/O mapped memory which is the opposite of the concept described above. In I/O mapped memory, any one of up to 256 bytes of a memory chip can be accessed using I/O instructions. This disclosure is useful in those microprocessor architectures, such as the Intel 8085, where a 3- byte instruction is required to access random-access memory for often used variables. With 3-byte instruction memory access, a large amount of read-only storage is required for program storage. I/O instructions in contrast require only 2 bytes and, therefore, if an I/O instruction can be used to access a memory location containing very often used data, substantial amounts of microprogram storage requirements can be saved. A practical example for the Intel 8085 is shown in the figure. The first 56K of the 64K addressing capability of the 8085 is designated as memory only and accesses memory 11. As shown in the figure, the memory 11 devices have their chip selects degated by inverting negative AND gate 16 in response to a positive I/O active signal on line 17 from the processor. In this way, the memory is only accessed when the signal on...