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EHT and Line Scan Regulator Circuit

IP.com Disclosure Number: IPCOM000043500D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-04
Document File: 4 page(s) / 61K

Publishing Venue

IBM

Related People

Morrish, AJ: AUTHOR

Abstract

The circuit described regulates both EHT (extra high tension) and line scan for a CRT by using a power operational amplifier in a feedback loop. In addition to the flyback transformer used in a conventional EHT circuit, an additional transformer controls the amplitude of the flyback pulse to regulate EHT and provide dynamic linearity correction for line scan. Fig. 1 shows an EHT regulator circuit. Consider first the circuit to the right of capacitor C, which is similar to a conventional flyback generated EHT circuit. A small transformer T1 is used in series with the flyback transformer (FBT); the former is wound with a 1:1 ratio so that its inductance is about 10% of the FBT.

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Page 1 of 4

EHT and Line Scan Regulator Circuit

The circuit described regulates both EHT (extra high tension) and line scan for a CRT by using a power operational amplifier in a feedback loop. In addition to the flyback transformer used in a conventional EHT circuit, an additional transformer controls the amplitude of the flyback pulse to regulate EHT and provide dynamic linearity correction for line scan. Fig. 1 shows an EHT regulator circuit. Consider first the circuit to the right of capacitor C, which is similar to a conventional flyback generated EHT circuit. A small transformer T1 is used in series with the flyback transformer (FBT); the former is wound with a 1:1 ratio so that its inductance is about 10% of the FBT. It is desirable that the leakage inductance of T1 is low so bifilar windings are recommended; this presents no problem as the breakdown voltage between the windings need be no more than the supply voltage Vs. Capacitors C1 and C2 are used in parallel with the primary windings of T1 and the FBT, respectively.

The values of the capacitors are chosen so that: L1 C1 = L2 C2 where: L1 = Inductance of T1

L2 = Inductance of FBT

C1 = Capacitor in parallel with T1

C2 = Capacitor in parallel with FBT The secondary winding of T1 is connected between voltage source Vs and the two diodes D1 and D2 which are in parallel with the switching transistor Q1, which is driven as a conventional horizontal scan output device switching with a 50% duty cycle. When the supply voltage is applied, the following events occur (Fig. 2). At t = 0, Q1 is turned on; the supply voltage is applied across T1 and FBT. Also, the voltage source connected to the secondary of T1 is applied at a potential of V1. This voltage is transformed across T1 and appears at the primary. A current builds up in the primary windings of FBT and T1:

(Image Omitted)

as the primary windings of FBT and

T1 are in series (where t=time from t=0). It should be apparent at this stage that as the voltage across FBT and hence the current flowing in its primary are determined by V1, a method exists of controlling the maximum energy in the FBT during each cycle and, as a result, the amplitude of the flyback pulse. Now, the secondary current in T1 is determined by the current in the primary. Assuming leakage inductance is negligible, the sum of the currents into the windings of T1 is IT1p + IT1s . Consider now the events which occur at time=t1 in Fig. 2. The switching transistor Q1 turns off; this causes the current in the FBT to now flow into C2; as this capacitor is connected in parallel with the FBT, the current flows in a closed loop with no effect on the rest of the circuit. A flyback pulse is generated across the FBT primary of amplitude:

(Image Omitted)

1

Page 2 of 4

where IFBTP = peak current at t1 in FBT Vp2 = peak flyback voltage across FBT at t2 Similarly, the current flowing in T1 has no other path than to flow into C1, causing a flyback pulse to be generated across the windings of...