Browse Prior Art Database

Erased Zeroes Digital Write Modulation Scheme

IP.com Disclosure Number: IPCOM000043586D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Griesel, DF: AUTHOR

Abstract

This is a write scheme where the polarity of the write current is switched to the opposite polarity at the beginning of each bit period. To write a 0, the polarity is switched again at the midpoint of the bit period. To write a 1, there is no change in the polarity. The write current may be turned off for portions of the bit period. The higher frequency that results from writing zeroes in this manner is naturally filtered out by the write and read process such that the zeroes are AC erased. A shows the write scheme with the write current turned on for the full bit period. B shows the write current turned on for a portion of the bit period. C shows the write current turned off for one-half of the bit period only during a 1 code.

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Erased Zeroes Digital Write Modulation Scheme

This is a write scheme where the polarity of the write current is switched to the opposite polarity at the beginning of each bit period. To write a 0, the polarity is switched again at the midpoint of the bit period. To write a 1, there is no change in the polarity. The write current may be turned off for portions of the bit period. The higher frequency that results from writing zeroes in this manner is naturally filtered out by the write and read process such that the zeroes are AC erased. A shows the write scheme with the write current turned on for the full bit period. B shows the write current turned on for a portion of the bit period. C shows the write current turned off for one-half of the bit period only during a 1 code. D shows the write current turned off for major portions of the bit cell and during the second half of the 1-bit period.

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