Browse Prior Art Database

Attribute Memory for Display Adapter

IP.com Disclosure Number: IPCOM000043593D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Landers, JD: AUTHOR

Abstract

This article describes a display adapter which use a minimum number of eight-bit words to represent displayable characters and character attributes, such as reverse video, blinking or intensify. A separate, small attribute RAM (random-access memory) is provided. This RAM has one bit for each display screen location . If the bit is on, data stored in a character RAM represents an attribute. Referring to the drawing, the display adapter has two separate random-access memories. Memory 10 stores data representing both displayable characters and attributes for those characters. Attribute memory 12 stores data indicating an attribute is to exist at a particular screen location. Memories 10 and 12 use eight-bit words.

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Attribute Memory for Display Adapter

This article describes a display adapter which use a minimum number of eight- bit words to represent displayable characters and character attributes, such as reverse video, blinking or intensify. A separate, small attribute RAM (random- access memory) is provided. This RAM has one bit for each display screen location . If the bit is on, data stored in a character RAM represents an attribute. Referring to the drawing, the display adapter has two separate random-access memories. Memory 10 stores data representing both displayable characters and attributes for those characters. Attribute memory 12 stores data indicating an attribute is to exist at a particular screen location. Memories 10 and 12 use eight-bit words. An eight-bit word in memory 10 can represent 1 of 256 possible displayable characters or (conceivably) 1 of 256 different attributes. In practice, the number of attributes is considerably less than that. CPU 14 loads both memory 10 and memory 12 through a memory multiplexer circuit 16. When the memories have been loaded, they can be addressed through multiplexer 16 by a timing generator 18. Timing generator 18 has an 11-bit-wide address path. Eleven bits are used to address the memory 10. All 11 bits are used in the attribute circuit. The eight upper bits are applied to attribute memory 12 to select a single word representing 8 possible screen display locations. The three lower bits are used to select one of the eight...