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Browse Prior Art Database

Adjustable Counter for Minimum Decodes

IP.com Disclosure Number: IPCOM000043622D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Heim, LS: AUTHOR [+2]

Abstract

Where a file attachment is required to identify three different fields having unique address marks, a counter may be started at a fixed value and allowed to run continuously until the end of the field. This requires the use of three different sets of counter decodes. The counter could be set to a certain value depending upon the type of address mark so that the count at the end of the field would be the same for all three. This approach presents a problem at the beginning of the field in that multiple counter decodes for each of the fields are required. The problem is resolved using an adjustable counter designed to keep all decodes constant (Fig. 2) for the three fields, as shown in Fig. 1. The bit synchronizer looks for two bytes of zeros.

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Adjustable Counter for Minimum Decodes

Where a file attachment is required to identify three different fields having unique address marks, a counter may be started at a fixed value and allowed to run continuously until the end of the field. This requires the use of three different sets of counter decodes. The counter could be set to a certain value depending upon the type of address mark so that the count at the end of the field would be the same for all three. This approach presents a problem at the beginning of the field in that multiple counter decodes for each of the fields are required. The problem is resolved using an adjustable counter designed to keep all decodes constant (Fig. 2) for the three fields, as shown in Fig. 1. The bit synchronizer looks for two bytes of zeros. When the first bit (a one) of the address mark is detected, the counter is set to 9. At a count of 10 the type of address mark is latched and, if the address mark is a logical identifier (LID) the counter is advanced to 12, or advanced to either 16 or 272 for a data address mark. At a count of 16 a diskette identifier (DID) or a LID advances the counter to 528 which is the start of the cyclic redundancy check (CRC) field. At a count of 539, and if the command is a write to the file, the counter is reset to 3 which is the start of the next sync field. During the write command, the counter sequence is again determined by the type of address mark being written.

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