Browse Prior Art Database

Reading of a Three-Position Switch With One Digital Data Line

IP.com Disclosure Number: IPCOM000043654D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Danner, DR: AUTHOR

Abstract

The reading of a three-position switch requires only one digital data line by employing a flip-flop. A three-position switch 1 is engaged with one of the contacts 2, 3, and 4. The contact 4 is connected to ground, the contact 3 is connected to +5 volts, and the contact 2 is connected to the Q output of a flip-flop 5, which may be a 74LS73 JK flip-flop, for example. The flip-flop 5 must be configured to operate in "toggle" mode. In the case of a "JK" variety, this consists of tying the J and K inputs high. The switch 1 is connected to a microprocessor, which may be an 8051 microprocessor, for example, through a tri-state buffer integrated circuit 6, which may be a 74LS125, for example, with a data line 7.

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Reading of a Three-Position Switch With One Digital Data Line

The reading of a three-position switch requires only one digital data line by employing a flip-flop. A three-position switch 1 is engaged with one of the contacts 2, 3, and 4. The contact 4 is connected to ground, the contact 3 is connected to +5 volts, and the contact 2 is connected to the Q output of a flip-flop 5, which may be a 74LS73 JK flip-flop, for example. The flip-flop 5 must be configured to operate in "toggle" mode. In the case of a "JK" variety, this consists of tying the J and K inputs high. The switch 1 is connected to a microprocessor, which may be an 8051 microprocessor, for example, through a tri-state buffer integrated circuit 6, which may be a 74LS125, for example, with a data line 7. When the position of the switch 1 is to be determined, a low pulse from an address decoder is supplied over a line 8 to the tri-state buffer integrated circuit 6. This enables a signal to be supplied from the switch 1 through the line 7 to the microprocessor with the state of the signal depending on which of the contacts 2, 3, and 4 the switch 1 is engaging. When the pulse on the line 8 goes low, the tri-state buffer integrated circuit 6 enables reading of the voltage level on the switch 1 in accordance with the contact 2, 3, or 4 with which the switch 1 is in engagement. When the pulse on the line 8 rises, an inverter 9 causes a negative-going edge to be supplied to a CLK input of the flip-flop 5. Thi...