Browse Prior Art Database

Isolation of Logic Circuits

IP.com Disclosure Number: IPCOM000043657D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Edwards, JC: AUTHOR [+3]

Abstract

In a battery backed-up pluggable CMOS RAM cartridge, a battery 1 is utilized as a power source when the RAM cartridge is unplugged from its machine. When a memory device 2 and a non-memory device 3 of the cartridge have a common ground, as is required when the cartridge is plugged into the machine, the battery 1 has to provide drain current for both the memory device 2 and the non-memory device 3. Because the current drain through the non-memory device 3 is about the same as the current drain through the memory device 2 in a CMOS RAM, the battery 1 would have to be sized to provide a standby current drain of two times that required solely for the memory device 2.

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Isolation of Logic Circuits

In a battery backed-up pluggable CMOS RAM cartridge, a battery 1 is utilized as a power source when the RAM cartridge is unplugged from its machine. When a memory device 2 and a non-memory device 3 of the cartridge have a common ground, as is required when the cartridge is plugged into the machine, the battery 1 has to provide drain current for both the memory device 2 and the non-memory device 3. Because the current drain through the non-memory device 3 is about the same as the current drain through the memory device 2 in a CMOS RAM, the battery 1 would have to be sized to provide a standby current drain of two times that required solely for the memory device 2. By isolating a ground 4 of the memory device 2 from a ground 5 of a non-memory device 3 when the RAM cartridge is unplugged from the machine, there is no drain leakage from the battery 1 through the non-memory device 3. When the RAM cartridge is plugged into the machine, the grounds 4 and 5 are connected to each other within the machine. Since the leakage current (IRIN) through the RAM inputs of the memory device 2 is relatively small, the battery 1 has to be sized primarily only for the ISTANDBY supplied to the memory device 2. Thus, the battery 1 can be sized for the power needed to back up only the memory device 2 rather than also having to provide for drain leakage from the battery 1 through the non-memory device 3 as would occur if the grounds 4 and 5 were not isolated.

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