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Simple Technique to Make Symmetrical Transistors

IP.com Disclosure Number: IPCOM000043687D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Arienzo, M: AUTHOR [+3]

Abstract

This article relates generally to the fabrication of bipolar transistors and more particularly to the fabrication of symmetrical bipolar transistors. In fabricating the symmetrical transistor structure disclosed, a layer of buried oxide is formed with the opening of the oxide aligned to an opening in a top layer of oxide. Fig. 1 shows a cross-sectional schematic view of the resulting device which has minimal parasitic capacitance. The fabrication technique is described below in conjunction with Figs. 2-7. The structure of Fig. 2 results from the following process steps: 1. Deposit and define a stack consisting of Al/Si3N4/oxide on the surface of an n silicon substrate. The thicknesses of the layers are about 0.8, 0.2 and 0.1 um, respectively.

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Simple Technique to Make Symmetrical Transistors

This article relates generally to the fabrication of bipolar transistors and more particularly to the fabrication of symmetrical bipolar transistors. In fabricating the symmetrical transistor structure disclosed, a layer of buried oxide is formed with the opening of the oxide aligned to an opening in a top layer of oxide. Fig. 1 shows a cross-sectional schematic view of the resulting device which has minimal parasitic capacitance. The fabrication technique is described below in conjunction with Figs. 2-7. The structure of Fig. 2 results from the following process steps: 1. Deposit and define a stack consisting of Al/Si3N4/oxide on the surface of an n silicon

substrate. The thicknesses of the layers are about

0.8, 0.2 and 0.1 um, respectively. This can be

accomplished, for example, by chemical vapor

deposition of oxide and nitride and by using a

resist lift-off technique to define the aluminum

pattern after aluminum deposition. Al is then used

as a mask to etch the nitride and oxide with RIE

(reactive-ion etching) in CF4 + H2 . The Si

substrate is disposed on an n+ sublayer over p

substrate. 2. Fig. 3 shows the structure of Fig. 2 after oxygen,

preferably 320+, is ion implanted into Si using Al

as a mask. The dose should be greater than

1018cm-2 . 3. Strip the Al and anneal at 780OEC about 8 hours to

form a buried SiOx layer. 4. Fig. 4 shows an intermediate structure after boron is ion implanted to form an extrinsic...