Browse Prior Art Database

Input/Output Cards for Device Attachments

IP.com Disclosure Number: IPCOM000043706D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Baker, ED: AUTHOR [+2]

Abstract

A technique is described whereby an input/output (I/O) attachment card is divided into two half-size cards with the hardware and microcode which are the same and which are common to most types of I/O devices being located on one of the half-size cards. This is particularly useful in the attachment of a variety of I/O devices to a computer I/O channel. Of essence is the incorporation on a single half-size card of the common logic and microcode that are used in nearly all I/O applications, such common logic including: 1. the interface logic for the computer I/O channel; 2. a microprocessor; 3. hardware timers; 4. direct-memory access controls; 5. random-access memory; and 6. read-only memory for micro-supervisor storage.

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Input/Output Cards for Device Attachments

A technique is described whereby an input/output (I/O) attachment card is divided into two half-size cards with the hardware and microcode which are the same and which are common to most types of I/O devices being located on one of the half-size cards. This is particularly useful in the attachment of a variety of I/O devices to a computer I/O channel. Of essence is the incorporation on a single half-size card of the common logic and microcode that are used in nearly all I/O applications, such common logic including: 1. the interface logic for the computer I/O channel; 2. a microprocessor;

3. hardware timers;

4. direct-memory access controls;

5. random-access memory; and

6. read-only memory for micro-supervisor storage. The logic for any given I/O device would be packaged on two half-size cards, an I/O base half card and a device-dependent half card, and connected as shown in the drawing. The base half card contains the common logic set forth above, and the device-dependent half card contains the interface logic which varies from one type of device to another. The connections between the two half-size cards will propagate the following: 1. microprocessor memory - I/O data bus; 2. memory - I/O address bus;

3. direct-memory access control and tag lines;

4. interrupt lines;

5. memory and I/O control lines;

6. reset line (bidirectional); and

7. power lines. The microprocessor on the base half card requires a bidirectional comm...