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Ion-Implant Resistor-Emitter Anneal Process

IP.com Disclosure Number: IPCOM000043738D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Blouse, JL: AUTHOR [+4]

Abstract

In the fabrication of NPN bipolar integrated circuits having high ohmic resistors it is conventional to form the resistors after forming the transistors. The transistor-forming aspect ends with the steps of a high dose n-type (e.g. arsenic) emitter implant and a high temperature (e.g., 1000ŒC) anneal. The resistors are typically formed by implanting specific regions of the semiconductor body with p-type (e.g., boron) ions of suitable energy (90-200 keV) and then annealing at a relatively low temperature (e.g., 900ŒC). The method disclosed herein eliminates the separate relatively low temperature resistor anneal step by implanting the resistor regions prior to the emitter anneal step and accomplishing the resistor anneal simultaneously with the emitter anneal at the high temperature.

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Ion-Implant Resistor-Emitter Anneal Process

In the fabrication of NPN bipolar integrated circuits having high ohmic resistors it is conventional to form the resistors after forming the transistors. The transistor-forming aspect ends with the steps of a high dose n-type (e.g. arsenic) emitter implant and a high temperature (e.g., 1000OEC) anneal. The resistors are typically formed by implanting specific regions of the semiconductor body with p- type (e.g., boron) ions of suitable energy (90-200 keV) and then annealing at a relatively low temperature (e.g., 900OEC). The method disclosed herein eliminates the separate relatively low temperature resistor anneal step by implanting the resistor regions prior to the emitter anneal step and accomplishing the resistor anneal simultaneously with the emitter anneal at the high temperature.

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