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Medium Speed Frequency Shift Keyed Demodulator Using Circular Correlation

IP.com Disclosure Number: IPCOM000043763D
Original Publication Date: 1984-Sep-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Davis, GT: AUTHOR

Abstract

The medium speed FSK (Frequency Shift Keyed) demodulator circuit, as shown in Fig. 1, uses circular correlation instead of a conventional linear correlation algorithm in improving signal-to-noise performance of modems. By using circular correlation to demodulate the FSK signal, a complete correlation is performed during each sample period. By comparison, a linear demodulator produces only one term in the correlation for each sample processed, thus stretching the correlation out over a complete baud interval. Although circular correlation increases the computational complexity, the wider opening in the eye pattern significantly reduces the sensitivity to phase jitter. After the FSK signal is filtered at 1, it enters sample doubler 2 where a typical 9600 Hz sample rate is doubled to 19200 Hz for a 1200 baud modem.

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Medium Speed Frequency Shift Keyed Demodulator Using Circular Correlation

The medium speed FSK (Frequency Shift Keyed) demodulator circuit, as shown in Fig. 1, uses circular correlation instead of a conventional linear correlation algorithm in improving signal-to-noise performance of modems. By using circular correlation to demodulate the FSK signal, a complete correlation is performed during each sample period. By comparison, a linear demodulator produces only one term in the correlation for each sample processed, thus stretching the correlation out over a complete baud interval. Although circular correlation increases the computational complexity, the wider opening in the eye pattern significantly reduces the sensitivity to phase jitter. After the FSK signal is filtered at 1, it enters sample doubler 2 where a typical 9600 Hz sample rate is doubled to 19200 Hz for a 1200 baud modem. A hard limiter 3 is used to avoid the complexity of automatic gain control (AGC) circuitry. At delay line 4, detected data is shifted one baud period as shown in the timing diagram (Fig. 2), line A, B and C. Effectively, the first half of the preceding bit period is compared to the last half, each time a new sample is entered into the delay line. Although in linear correlation 50% fewer samples are used, circular correlation produces a trapezoidal pattern, as shown in line E (Fig. 2), rather than triangular, line F, enabling slicer 6 in Fig. 1 to be less sensitive to phase jitter an...