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Self-Healing RAM Management Algorithm

IP.com Disclosure Number: IPCOM000043867D
Original Publication Date: 1984-Oct-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Crouse, RS: AUTHOR [+4]

Abstract

A microcode technique is described whereby a microprocessor is used to quantize random-access memory (RAM) into segments, called "pages", then utilizing error detection and scoring algorithms, enables a microprocessor-based product to tolerate short-term non-permanent RAM defects. With the advent of dense RAM cell structures, the probability of memory cell failures, either solid or intermittent, increases over the life of the memory chip. A technique has been devised to provide a microprocessor with the ability to tolerate RAM defects, using a "self-healing" memory management algorithm, without degrading the performance of the final product. Should a data error occur during a RAM read operation, indicating a hardware detect parity error, the microprocessor increments the error count for that particular memory page by "2".

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Self-Healing RAM Management Algorithm

A microcode technique is described whereby a microprocessor is used to quantize random-access memory (RAM) into segments, called "pages", then utilizing error detection and scoring algorithms, enables a microprocessor-based product to tolerate short-term non-permanent RAM defects. With the advent of dense RAM cell structures, the probability of memory cell failures, either solid or intermittent, increases over the life of the memory chip. A technique has been devised to provide a microprocessor with the ability to tolerate RAM defects, using a "self-healing" memory management algorithm, without degrading the performance of the final product. Should a data error occur during a RAM read operation, indicating a hardware detect parity error, the microprocessor increments the error count for that particular memory page by "2". The error count is stored. If the microprocessor reads a page without detecting a parity error, it will subtract "1" from the page error count, or assign a "0" if the result is negative. Should the error count reach "3" or more, the page is flagged indicating a defective RAM and no more data is stored in that memory location. When the error count is less than "3", the process allows the continued use of intermittently failed memory cells. The process eliminates the possibility of malfunctions being caused by stray alpha particles, or similar spurious occurrences, which could cause a momentary change of state in a memory location, yet function properly later. In this case an error count would temporarily show a "2", but after the next two usages, the count would be decremented ba...