Browse Prior Art Database

Variable Speed Adapter for Data Transmission

IP.com Disclosure Number: IPCOM000044011D
Original Publication Date: 1984-Oct-01
Included in the Prior Art Database: 2005-Feb-05
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Borgnis Desbordes, P: AUTHOR [+3]

Abstract

A device including a controller and several variable speed adapters (VSAs) is made to control the data transfers in both directions between data terminals operating at different rates and a high speed line working at full capacity. The mechanism used in each VSA to control the data transfer from each terminal to the high speed line is based on the use of buffers with cyclic pointers (p1, p2, etc...) and a programmable counter which provides a clock in transmit and receive modes, thus controlling the transfer rate of data at different rates. The controller is in charge of hybrid multiplexing tasks. In other words, it periodically builds-up (in ADD) fixed length data frames including a block of data from each of the operating terminals. The block boundaries within the frames are flexible.

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Variable Speed Adapter for Data Transmission

A device including a controller and several variable speed adapters (VSAs) is made to control the data transfers in both directions between data terminals operating at different rates and a high speed line working at full capacity. The mechanism used in each VSA to control the data transfer from each terminal to the high speed line is based on the use of buffers with cyclic pointers (p1, p2, etc...) and a programmable counter which provides a clock in transmit and receive modes, thus controlling the transfer rate of data at different rates. The controller is in charge of hybrid multiplexing tasks. In other words, it periodically builds-up (in ADD) fixed length data frames including a block of data from each of the operating terminals. The block boundaries within the frames are flexible. Each VSA mechanism is based on the use of a set of two buffers and a programmable counter. One buffer is used to transmit (XMIT) the other to receive (RCV). The counter is programmable and made to be able to provide one out of two predetermined transfer rates in each direction (XMIT and RCV). The controller is made to build a frame periodically (e.g., every 20 msec) by requesting a given number of bytes from, say, adapter 1. Thus VSA 1 reads these bytes out from its RCV buffer, checks the number of remaining bytes after this operation, and adjusts accordingly the transfer rate for data to be provided by its attached terminal for the nex...